We need to clear the R_X86_64_converted_reloc_bit bit after setting it
to avoid leaking it out by --emit-relocs.

bfd/

	PR ld/23324
	* elf64-x86-64.c (elf_x86_64_relocate_section): Clear the
	R_X86_64_converted_reloc_bit bit.

ld/

	PR ld/23324
	* testsuite/ld-x86-64/pr23324.s: New file.
	* testsuite/ld-x86-64/pr23324a.d: Likewise.
	* testsuite/ld-x86-64/pr23324b.d: Likewise.

(cherry picked from commit b638b5d5)

A recent case in golang highlighted that gas wasn't warning on these
unpredictable cases in the architecture. Fixed thusly.

I need to audit gcc to make sure we have early clobbers on the
patterns but that's a separate patch.

Tested aarch64-none-elf and gas

Ok ?

Ramana

2018-06-29 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

        * config/tc-aarch64.c (warn_unpredictable_ldst): Add
        unpredictable cases for ldxp, stlxrb, stlxrh, stlxr.  *
        testsuite/gas/aarch64/diagnostic.s: New tests.  *
        testsuite/gas/aarch64/diagnostic.l: Adjust.

Some instructions in Armv8-a place a limitation on FP16 registers that can be
used as the register from which to select an element from.

e.g. fmla restricts Rm to 4 bits when using an FP16 register.  This restriction
does not apply for all instructions, e.g. fcmla does not have this restriction
as it gets an extra bit from the M field.

Unfortunately, this restriction to S_H was added for all _Em operands before,
meaning for a large number of instructions you couldn't use the full register
file.

This fixes the issue by introducing a new operand _Em16 which applies this
restriction only when paired with S_H and leaves the _Em and the other
qualifiers for _Em16 unbounded (i.e. using the full 5 bit range).

Also the patch updates all instructions that should be affected by this.

opcodes/

	PR binutils/23192
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.
	* aarch64-dis.c (aarch64_ext_reglane): Add AARCH64_OPND_Em16 constraint.
	* aarch64-opc.c (operand_general_constraint_met_p,
	aarch64_print_operand): Likewise.
	* aarch64-tbl.h (aarch64_opcode_table): Change Em to Em16 for smlal,
	smlal2, fmla, fmls, fmul, fmulx, sqrdmlah, sqrdlsh, fmlal, fmlsl,
	fmlal2, fmlsl2.
	(AARCH64_OPERANDS): Add Em2.

gas/

	PR binutils/23192
	* config/tc-aarch64.c (process_omitted_operand, parse_operands): Add
	AARCH64_OPND_Em16
	* testsuite/gas/aarch64/advsimd-armv8_3.s: Expand tests to cover upper
	16 registers.
	* testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise.
	* testsuite/gas/aarch64/advsimd-compnum.s: Likewise.
	* testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
	* testsuite/gas/aarch64/sve.d: Likewise.

include/

	PR binutils/23192
	*opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.

(cherry picked from commit 369c9167

)
Signed-off-by: Tamar Christina <tamar.christina@arm.com>

With the update to newer autotools, some gas object files are now
built in config/, breaking xtensa-elf and ia64-vms.  This patch fixes
the dependencies.

	* configure.ac: Specify extra_objects with leading "config/"
	for xtensa-relax.o and te-vms.o.  Use case statements to unique
	extra_objects.  Formatting.
	* configure: Regenerate.

(cherry picked from commit e11078da)

The testcase isn't valid.  If it happens to run on your target, you're
lucky.

	PR 23169
	* testsuite/ld-ifunc/ifunc.exp: Don't run pr23169 tests on
	powerpc.  Comment.

Seen with tcl 8.5.13:
ERROR: tcl error sourcing .../ld/testsuite/ld-bootstrap/bootstrap.exp.
ERROR: expected boolean value but got " [istarget ia64-*-elf*] || [istarget ia64-*-linux*"
    while executing
"if { "$flags" == "--static" && { [istarget ia64-*-elf*] || [istarget ia64-*-linux*] }
	 || [istarget mips*-*-linux*] } {
	# On ia64 and mips, tmpdir/l..."

	* testsuite/ld-bootstrap/bootstrap.exp: Use parentheses rather
	than curly braces in logical expression.

This reverts commit 57c0d77c.

opcodes	* po/uk.po: Updated Ukranian translation.
	* po/de.po: Updated German translation.
	* po/pt_BR.po: Updated Brazilian Portuguese translation.

ld	* po/uk.po: Updated Ukranian translation.
gold	* po/uk.po: Updated Ukranian translation.
gas	* po/uk.po: Updated Ukranian translation.
bfd	* po/uk.po: Updated Ukranian translation.

binutils* po/sv.po: Updated Swedish translation.
	* po/uk.po: Updated Ukranian translation.

opcodes	* nfp-dis.c: Fix spelling mistake.

ld	* emultempl/aarch64elf.em: Fix spelling mistake.
	* emultempl/avrelf.em: Likewise.
	* emultempl/elf32.em: Likewise.

binutils* doc/binutils.texi: Fix spelling mistakes.

	* elfnn-aarch64.c (_bfd_aarch64_erratum_835769_stub_name): Check
	for malloc returning NULL.
	(_bfd_aarch64_erratum_843419_fixup): Check for
	_bfd_aarch64_erratum_835769_stub_name returning NULL.

gold/
	* version.cc (version_string): Bump to 1.16.
	* NEWS: Add new features in 1.16.

gold/
	PR gold/22914
	* x86_64.cc (Target_x86_64::record_gnu_property): Initialize val.

gold/
	PR gold/22915
	* x86_64.cc (Output_data_plt_x86_64_ibt): New class.
	(Target_x86_64::do_make_data_plt): (All instantiations) Check for
	IBT feature bit and create IBT PLTs.

The original patch did not give the target enough hooks to discover that
an input object file does not have a particular property. For the
GNU_PROPERTY_X86_FEATURE_1_AND property, for example, where a missing
property should be assumed to be all zeroes, and ANDed with other
object modules, this is essential. We now store the target-specific
properties locally in the Target structure as native uint32_t fields,
then AND the per-object feature bits with the program's feature bits
when we're finished processing each input object file. The target-specific
properties are then added back to the output note section during
finalization.

gold/
	PR gold/22914
	* layout.cc (read_sized_value): Fix spelling of section name.
	(Layout::layout_gnu_property): Call Sized_target::record_gnu_property
	for target-specific properties;
	don't store them with target-independent properties yet.
	(Layout::merge_gnu_properties): New method.
	(Layout::add_gnu_property): New method.
	(Layout::create_gnu_properties_note): Call target to finalize
	target-specific properties. Fix spelling of output section name.
	* layout.h (Layout::merge_gnu_properties): New method.
	(Layout::add_gnu_property): New method.
	* object.cc (Sized_relobj_file::do_layout): Call
	Layout::merge_gnu_properties.
	* target.h (Target::merge_gnu_property): Remove.
	(Target::finalize_gnu_properties): New method.
	(Target::do_merge_gnu_property): Move to Sized_target and rename.
	(Target::do_finalize_gnu_properties): New virtual method.
	(Sized_target::record_gnu_property): Moved and renamed from
	Target::do_merge_gnu_property.
	(Sized_target::merge_gnu_properties): New virtual method.
	* x86_64.cc (Target_x86_64::isa_1_used_, isa_1_needed_)
	(feature_1_, object_feature_1_, seen_first_object_): New data members.
	(Target_x86_64::do_merge_gnu_property): Rename to ...
	(Target_x86_64::record_gnu_property): ... this.  Save target-specific
	properties in Target class object.
	(Target_x86_64::merge_gnu_properties): New method.
	(add_property): New static inline function.
	(Target_x86_64::do_finalize_gnu_properties): New method.
	* testsuite/Makefile.am (gnu_property_test): Remove C source file;
	link directly without compiler driver.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/gnu_property_a.S: Add _start.

Replacing push_back() with emplace_back() eliminates the calls to the
copy constructor, but I still had to provide explicit copy constructors
because of the call to vector::reserve(), which tries to instantiate them
even though they'll never actually be called when reserve() is called
on an empty vector.

gold/
	* incremental.cc (Sized_incremental_binary::setup_readers): Use
	emplace_back for GCC 5 and later.
	* incremental.h (Incremental_binary::Input_reader): Provide copy
	constructor.
	(Sized_incremental_binary::Sized_input_reader): Likewise.

Commit

  e813d34a ("Align natural-format register values to the same column")

changed the output of "info registers" (tabs to spaces), but didn't
update gdb.base/jit-reader.exp.  Update the regexes to expect spaces
instead.

gdb/testsuite/ChangeLog:

	* gdb.base/jit-reader.exp (jit_reader_test): Expect spaces in
	"info registers" output.

elfcpp/
	PR gold/22914
	* elfcpp.h (NT_GNU_PROPERTY_TYPE_0): New note type.
	(GNU_PROPERTY_*): New Gnu property types.
	* x86_64.h (GNU_PROPERTY_X86_FEATURE_1_IBT)
	(GNU_PROPERTY_X86_FEATURE_1_SHSTK): New x86 feature bits.

gold/
	PR gold/22914
	* layout.cc (Layout::Layout): Initialize gnu_properties_.
	(read_sized_value, write_sized_value): New functions.
	(Layout::layout_gnu_property): New method.
	(Layout::create_notes): Call create_gnu_properties_note.
	(Layout::create_gnu_properties_note): New method.
	* layout.h (Layout::layout_gnu_property): New method.
	(Layout::create_gnu_properties_note): New method.
	(Layout::Gnu_property, Layout::Gnu_properties): New types.
	(Layout::gnu_properties_): New data member.
	* object.cc (Sized_relobj_file::layout_gnu_property_section): New
	method.
	(Sized_relobj_file::do_layout): Handle .note.gnu.property sections.
	* object.h (Sized_relobj_file::layout_gnu_property_section): New
	method.
	* target.h (Target::merge_gnu_property): New method.
	(Target::do_merge_gnu_property): New virtual method.
	* x86_64.cc (Target_x86_64::do_merge_gnu_property): New method.
	* testsuite/Makefile.am (gnu_property_test): New test case.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/gnu_property_a.S: New source file.
	* testsuite/gnu_property_b.S: New source file.
	* testsuite/gnu_property_c.S: New source file.
	* testsuite/gnu_property_main.c: New source file.
	* testsuite/gnu_property_test.sh: New test script.

This avoids assert failures when the register is bigger than the
slot size. This happens on Aarch64 when truncating Z registers
into an fpsimd structure. This can be triggered by running
gdb command "generate-core-file".

Also, when the register is smaller then the slot size, then
zero pad when writing to the slot, and truncate when writing
to the regcache. This happens on Aarch64 with the CPSR register.

Continue to ensure registers are invalidated when both buffers
are null.

gdb/
	* regcache.c (readable_regcache::read_part): Fix asserts.
	(reg_buffer::raw_collect_part): New function.
	(regcache::write_part): Fix asserts.
	(reg_buffer::raw_supply_part): New function.
	(regcache::transfer_regset_register): New helper function.
	(regcache::transfer_regset): Call new functions.
	(regcache_supply_regset): Use gdb_byte*.
	(regcache::supply_regset): Likewise.
	(regcache_collect_regset): Likewise.
	(regcache::collect_regset): Likewise.
	* regcache.h (reg_buffer::raw_collect_part): New declaration.
	(reg_buffer::raw_supply_part): Likewise.
	(regcache::transfer_regset_register): Likewise.
	(regcache::transfer_regset): Use gdb_byte*.

This patch fixes a disassembly issue with the aliases to subs with a shifted
register.  The subs instruction with the zero register as destination is
supposed to alias to cmp and when the first input register is the zero register
the subs is supposed to be aliased to negs.

This means that a subs with destination and first input registers the zero
register is supposed to be a cmp.

This is done by raising the priority of the cmp alias.

opcodes/

	* aarch64-tbl.h (aarch64_opcode_table): Fix alias flag for negs
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Likewise.

gas/

	* testsuite/gas/aarch64/addsub.s: Add negs to zero reg test.
	* testsuite/gas/aarch64/addsub.d: Likewise.

Prevents build break on aarch64 Suse.

2018-06-22  Alan Hayward  <alan.hayward@arm.com>

gdb/
	* nat/aarch64-sve-linux-ptrace.h (HAS_SVE_STATE): Use &.

	opcodes/
	* mips-dis.c (print_mips_disassembler_options): Fix a typo in
	`-M ginv' option description.

When we have a weak reference to a symbol defined in an
as-needed library, and that library ends up not-needed, gold
simply clears the version information in the symbol table, even
if the symbol could have been resolved by a needed library later
in the link order. This results in a loss of version information,
which can cause the program to bind to the wrong version at run
time.

This patch lets a dynamic definition override an earlier one if
the earlier one is from a not-needed library, so that we can
retain the version information from the binding to the needed
library. In order to do that, the tracking of needed/not-needed
had to be moved up to symbol resolution time, instead of during
Symbol_table::set_dynsym_indexes().

In cases where we still end up discarding version information,
I've added a warning.

For the original problem report and discussion, see:

https://stackoverflow.com/questions/50751421/undefined-behavior-in-shared-lib-using-libpthread-but-not-having-it-in-elf-as-d

gold/
	* resolve.cc (Symbol_table::resolve): Rename tobinding to
	orig_tobinding.  Call set_is_needed() for objects that resolve
	non-weak references.
	(Symbol_table::should_override): Allow a dynamic definition to
	override an earlier one in a not-needed library.
	* symtab.cc (Symbol_table::set_dynsym_indexes): Remove separate
	processing for as-needed symbols.  Add warning when discarding
	version informatin.
	* testsuite/Makefile.am (weak_as_needed): New test case.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/weak_as_needed.sh: New test script.
	* testsuite/weak_as_needed_a.c: New source file.
	* testsuite/weak_as_needed_b.c: New source file.
	* testsuite/weak_as_needed_b.script: New version script.
	* testsuite/weak_as_needed_c.c: New source file.
	* testsuite/weak_as_needed_c.script: New version script.

Correct the formatting of `_bfd_mips_elf_compact_eh_encoding' and
`_bfd_mips_elf_cant_unwind_opcode' definitions which extend beyond 79
columns.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_compact_eh_encoding)
	(_bfd_mips_elf_cant_unwind_opcode): Correct formatting.

Shuffle code in `_bfd_mips_post_process_headers' so that the setting of
the EI_ABIVERSION ELF file header field is complete before calling
`_bfd_elf_post_process_headers'.  This used to be the case, but was
changed with commit 351cdf24 ("[MIPS] Implement O32 FPXX, FP64 and
FP64A ABI extensions") for no reason.

	bfd/
	* elfxx-mips.c (_bfd_mips_post_process_headers): Keep
	EI_ABIVERSION setting together.

Define enumeration constants based on generated `libc-abis.h' from GNU
libc, adding a MIPS_ prefix as these are port-specific.  Use them to
replace magic numbers stored in the EI_ABIVERSION field of the ELF file
header.

	bfd/
	* elfxx-mips.c (MIPS_LIBC_ABI_DEFAULT, MIPS_LIBC_ABI_MIPS_PLT)
	(MIPS_LIBC_ABI_UNIQUE, MIPS_LIBC_ABI_MIPS_O32_FP64)
	(MIPS_LIBC_ABI_MAX): New enumeration constants.
	(_bfd_mips_post_process_headers): Use them in place of magic
	numbers.

	bfd/
	* elfnn-riscv.c (riscv_elf_finish_dynamic_symbol): Update comment.
	Use SYMBOL_REFERENCES_LOCAL.  Add asserts for h->got.offset.