1. 16 Jan, 2019 1 commit
    • John Darrington's avatar
      S12Z: Emit RELOC_S12Z_OPR instead of RELOC_EXT24 where appropriate. · d5dcaf1b
      John Darrington authored
      When assembling instructions which involve OPR references, emit
      RELOC_S12Z_OPR instead of RELOC_EXT24.
      	* bfd-in2.h [BFD_RELOC_S12Z_OPR]: New reloc.
      	* libbfd.h: regen.
      	* elf32-s12z.c (eld_s12z_howto_table): R_S12Z_OPR takes non zero
      	source field.  (md_apply_fix): Apply final fix
      	to BFD_RELOC_S12Z_OPR.
      	* reloc.c[BFD_RELOC_S12Z_OPR]: New reloc.
      	* config/tc-s12z.c (emit_opr): Emit BFD_RELOC_S12Z_OPR instead of
      	* testsuite/gas/s12z/opr-indirect-expr.d: Expect R_S12Z_OPR instead
      	of R_S12Z_EXT24.
  2. 01 Jan, 2019 1 commit
  3. 13 Oct, 2018 1 commit
    • Alan Modra's avatar
      _bfd_clear_contents bounds checking · 0930cb30
      Alan Modra authored
      This PR shows a fuzzed binary triggering a segfault via a bad
      relocation in .debug_line.  It turns out that unlike normal
      relocations applied to a section, the linker applies those with
      symbols from discarded sections via _bfd_clear_contents without
      checking that the relocation is within the section bounds.  The same
      thing now happens when reading debug sections since commit
      a4cd947a, the PR23425 fix.
      	PR 23770
      	PR 23425
      	* reloc.c (_bfd_clear_contents): Replace "location" param with
      	"buf" and "off".  Bounds check "off".  Return status.
      	* cofflink.c (_bfd_coff_generic_relocate_section): Update
      	_bfd_clear_contents call.
      	* elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Likewise.
      	* elf32-arc.c (elf_arc_relocate_section): Likewise.
      	* elf32-i386.c (elf_i386_relocate_section): Likewise.
      	* elf32-metag.c (metag_final_link_relocate): Likewise.
      	* elf32-nds32.c (nds32_elf_get_relocated_section_contents): Likewise.
      	* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
      	* elf32-visium.c (visium_elf_relocate_section): Likewise.
      	* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
      	* elf64-x86-64.c *(elf_x86_64_relocate_section): Likewise.
      	* libbfd-in.h (_bfd_clear_contents): Update prototype.
      	* libbfd.h: Regenerate.
  4. 05 Oct, 2018 2 commits
    • Stafford Horne's avatar
      or1k: Add the l.adrp insn and supporting relocations · c8e98e36
      Stafford Horne authored
      This patch adds the new instruction and relocation as per proposal:
      This is to be added to the spec in an upcoming revision.  The new instruction
      l.adrp loads the page offset of the current instruction offset by
      a 21-bit immediate shifted left 13-bits.  This is meant to be used with
      a 13-bit lower bit page offset.  This allows us to free up the got
      register r16.
        l.adrp  r3, foo
        l.ori   r4, r3, po(foo)
        l.lbz   r5, po(foo)(r3)
        l.sb    po(foo)(r3), r6
      The relocations we add are:
       - BFD_RELOC_OR1K_PLTA26	For PLT jump relocation with PLT entry
         asm: plta()			implemented using l.ardp, meaning
      				no need for r16 (the GOT reg)
       - BFD_RELOC_OR1K_GOT_PG21	Upper 21-bit Page offset got address
         asm: got()
       - BFD_RELOC_OR1K_TLS_GD_PG21	Upper 21-bit Page offset with TLS General
         asm: tlsgd()			Dynamic calculation
       - BFD_RELOC_OR1K_TLS_LDM_PG21	Upper 21-bit Page offset with TLS local
         asm: tlsldm()		dynamic calculation
       - BFD_RELOC_OR1K_TLS_IE_PG21	Upper 21-bit Page offset with TLS Initial
         asm: gottp() 		Executable calculation
       - BFD_RELOC_OR1K_PCREL_PG21	Default relocation for disp21 (l.adrp
       - BFD_RELOC_OR1K_LO13		low 13-bit page offset relocation
         asm: po()			i.e. mem loads, addi etc
       - BFD_RELOC_OR1K_SLO13		low 13-bit page offset relocation
         asm: po()			i.e. mem stores, with split immediate
       - BFD_RELOC_OR1K_GOT_LO13,	low 13-bit page offset with GOT calcs
         asm: gotpo()
       - BFD_RELOC_OR1K_TLS_GD_LO13	Lower 13-bit offset with TLS GD calcs
         asm: tlsgdpo()
       - BFD_RELOC_OR1K_TLS_LDM_LO13	Lower 13-bit offset with TLS LD calcs
         asm: tlsldmpo()
       - BFD_RELOC_OR1K_TLS_IE_LO13	Lower 13-bit offset with TLS IE calcs
         asm: gottppo()
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* bfd-in2.h: Regenerated.
      	* elf32-or1k.c: (or1k_elf_howto_table): Fix formatting for
      	R_OR1K_PLT26, Add R_OR1K_PCREL_PG21, R_OR1K_GOT_PG21,
      	R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13,
      	R_OR1K_TLS_IE_LO13, R_OR1K_SLO13, R_OR1K_PLTA26.
      	(or1k_reloc_map): Add BFD_RELOC_OR1K_PCREL_PG21,
      	(elf_or1k_link_hash_table): Add field saw_plta.
      	(or1k_final_link_relocate): Add value calculations for new relocations.
      	(or1k_elf_relocate_section): Add section relocations for new
      	(or1k_write_plt_entry): New function.
      	(or1k_elf_finish_dynamic_sections): Add support for PLTA relocations
      	using new l.adrp instruction.  Cleanup PLT relocation code generation.
      	* libbfd.h: Regenerated.
      	* reloc.c: Add BFD_RELOC_OR1K_PCREL_PG21, BFD_RELOC_OR1K_LO13,
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* or1k.opc (parse_disp26): Add support for plta() relocations.
      	(parse_disp21): New function.
      	(or1k_rclass): New enum.
      	(or1k_rtype): New enum.
      	(or1k_imm16_relocs): Define new PO and SPO relocation mappings.
      	(parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
      	(parse_imm16): Add support for the new 21bit and 13bit relocations.
      	* or1korbis.cpu (f-disp26): Don't assume SI.
      	(f-disp21): New pc-relative 21-bit 13 shifted to right.
      	(insn-opcode): Add ADRP.
      	(l-adrp): New instruction.
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* config/tc-or1k.c (or1k_apply_fix): Add BFD_RELOC_OR1K_TLS_GD_PG21,
      	* testsuite/gas/or1k/allinsn.s: Add test for l.adrp.
      	* testsuite/gas/or1k/allinsn.d: Add test results for new
      	* testsuite/gas/or1k/reloc-1.s: Add tests to generate
      	R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13,
      	R_OR1K_TLD_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_LO13, R_OR1K_SLO13
      	* testsuite/gas/or1k/reloc-1.d: Add relocation results for
      	* testsuite/gas/or1k/reloc-2.s: Add negative tests for store to
      	* testsuite/gas/or1k/reloc-2.l: Add expected error test results.
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* testsuite/ld-or1k/or1k.exp: Add test cases for plt generation.
      	* testsuite/ld-or1k/plt1.dd: New file.
      	* testsuite/ld-or1k/plt1.s: New file.
      	* testsuite/ld-or1k/plt1.x.dd: New file.
      	* testsuite/ld-or1k/plta1.dd: New file.
      	* testsuite/ld-or1k/plta1.s: New file.
      	* testsuite/ld-or1k/pltlib.s: New file.
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
      	R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
      	R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
      	R_OR1K_SLO13, R_OR1K_PLTA26.
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* or1k-asm.c: Regenerated.
      	* or1k-desc.c: Regenerated.
      	* or1k-desc.h: Regenerated.
      	* or1k-dis.c: Regenerated.
      	* or1k-ibld.c: Regenerated.
      	* or1k-opc.c: Regenerated.
      	* or1k-opc.h: Regenerated.
      	* or1k-opinst.c: Regenerated.
    • Richard Henderson's avatar
      or1k: Add relocations for high-signed and low-stores · 1c4f3780
      Richard Henderson authored
      This patch adds the following target relocations:
       - BFD_RELOC_HI16_S		High 16-bit relocation, for used with signed
         asm: ha()			lower.
       - BFD_RELOC_HI16_S_GOTOFF	High 16-bit GOT offset relocation for local
         asm: gotoffha()		symbols, for use with signed lower.
       - BFD_RELOC_OR1K_TLS_IE_AHI16	High 16-bit TLS relocation with initial
         asm: gottpoffha()		executable calculation, for use with signed
       - BFD_RELOC_OR1K_TLS_LE_AHI16	High 16-bit TLS relocation for local executable
         asm: tpoffha()		variables, for use with signed lower.
       - BFD_RELOC_OR1K_SLO16		Split lower 16-bit relocation, used with
         asm: lo()			OpenRISC store instructions.
       - BFD_RELOC_OR1K_GOTOFF_SLO16	Split lower 16-bit GOT offset relocation for
         asm: gotofflo()		local symbols, used with OpenRISC store
       - BFD_RELOC_OR1K_TLS_LE_SLO16	Split lower 16-bit relocation for TLS local
         asm: tpofflo()		executable variables, used with OpenRISC store
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	    Stafford Horne  <shorne@gmail.com>
      	* bfd-in2.h: Regenerated.
      	* elf32-or1k.c (N_ONES): New macro.
      	(or1k_elf_howto_table): Fix R_OR1K_PLT26 to complain on overflow.
      	Add definitions for R_OR1K_TLS_TPOFF, R_OR1K_TLS_DTPOFF,
      	R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16, R_OR1K_SLO16,
      	(or1k_reloc_map): Add entries for BFD_RELOC_HI16_S,
      	(or1k_reloc_type_lookup): Change search loop to start ad index 0 and
      	also check results before returning.
      	(or1k_reloc_name_lookup): Simplify loop to use R_OR1K_max as index
      	(or1k_final_link_relocate): New function.
      	(or1k_elf_relocate_section): Add support for new AHI and SLO
      	relocations.  Use or1k_final_link_relocate instead of generic
      	(or1k_elf_check_relocs): Add support for new AHI and SLO relocations.
      	* reloc.c: Add new enums for BFD_RELOC_OR1K_SLO16,
      	and BFD_RELOC_OR1K_GOTOFF_LO16.
      	* libbfd.h: Regenerated.
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* or1k.opc: Add RTYPE_ enum.
      	(INVALID_STORE_RELOC): New string.
      	(or1k_imm16_relocs): New array array.
      	(parse_reloc): New static function that just does the parsing.
      	(parse_imm16): New static function for generic parsing.
      	(parse_simm16): Change to just call parse_imm16.
      	(parse_simm16_split): New function.
      	(parse_uimm16): Change to call parse_imm16.
      	(parse_uimm16_split): New function.
      	* or1korbis.cpu (simm16-split): Change to use new simm16_split.
      	(uimm16-split): Change to use new uimm16_split.
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* testsuite/gas/or1k/allinsn.d (l_ha): Add result for ha() relocation.
      	* testsuite/gas/or1k/allinsn.s (l_ha): Add test for ha() relocations.
      	* testsuite/gas/or1k/allinsn.exp: Renamed to or1k.exp.
      	* testsuite/gas/or1k/or1k.exp: Add reloc-2 list test.
      	* testsuite/gas/or1k/reloc-1.d: New file.
      	* testsuite/gas/or1k/reloc-1.s: New file.
      	* testsuite/gas/or1k/reloc-2.l: New file.
      	* testsuite/gas/or1k/reloc-2.s: New file.
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* testsuite/ld-or1k/offsets1.d: New file.
      	* testsuite/ld-or1k/offsets1.s: New file.
      	* testsuite/ld-or1k/or1k.exp: New file.
      yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
      	* or1k-asm.c: Regenerate.
  5. 20 Sep, 2018 1 commit
    • Nick Clifton's avatar
      Andes Technology has good news for you, we plan to update the nds32 port of binutils on upstream! · fbaf61ad
      Nick Clifton authored
      We have not only removed all unsupported and obsolete code, but also supported lost of new features,
      including better link-time relaxations and TLS implementations. Besides, the files generated by the
      newly assembler and linker usually get higher performance and more optimized code size.
      ld	* emultempl/nds32elf.em (hyper_relax): New variable.
      	the parameters of bfd_elf32_nds32_set_target_option
      	PARSE_AND_LIST_ARGS_CASES): Add new option --mhyper-relax.
      	* emultempl/nds32elf.em (nds32_elf_after_open): Updated.
      	* emultempl/nds32elf.em (tls_desc_trampoline): New variable.
      	* (nds32_elf_create_output_section_statements): Updated.
      	* (nds32_elf_after_parse): Disable relaxations when PIC is enable.
      	PARSE_AND_LIST_ARGS_CASES): Add new option --m[no-]tlsdesc-trampoline.
      include	* elf/nds32.h: Remove the unused target features.
      	* dis-asm.h (disassemble_init_nds32): Declared.
      	* elf/nds32.h (E_NDS32_NULL): Removed.
      	(E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
      	* opcode/nds32.h: Ident.
      	(N32_SUB6, INSN_LW): New macros.
      	(enum n32_opcodes): Updated.
      	* elf/nds32.h: Doc fixes.
      	* elf/nds32.h: Add R_NDS32_LSI.
      	* elf/nds32.h: Add new relocations for TLS.
      gas 	* config/tc-nds32.c: Remove the unused target features.
      	(nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp,
      	nds32_set_elf_flags_by_insn, nds32_insert_relax_entry,
      	nds32_apply_fix): Likewise.
      	(nds32_no_ex9_begin): Removed.
      	* config/tc-nds32.c (add_mapping_symbol_for_align,
      	make_mapping_symbol, add_mapping_symbol): New functions.
      	* config/tc-nds32.h (enum mstate): New.
      	(nds32_segment_info_type): Likewise.
      	* configure.ac (--enable-dsp-ext, --enable-zol-ext): New options.
      	* config.in: Regenerated.
      	* configure: Regenerated.
      	* config/tc-nds32.c (nds32_dx_regs):
      	Set the value according to the configuration.
      	(nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext):
      	(nds32_dsp_ext): New variable. Set the value according to the
      	(nds32_zol_ext): Likewise.
      	(asm_desc, nds32_pseudo_opcode_table): Make them static.
      	(nds32_set_elf_flags_by_insn): Updated.
      	(nds32_check_insn_available): Updated.
      	(nds32_str_tolower): New function.
      	* config/tc-nds32.c (relax_table): Updated.
      	(md_begin): Updated.
      	(md_assemble): Use XNEW macro to allocate space for `insn.info',
      	and then remember to free it.
      	(md_section_align): Cast (-1) to ValueT.
      	(nds32_get_align): Cast (~0U) to addressT.
      	(nds32_relax_branch_instructions): Updated.
      	(md_convert_frag): Add new local variable `final_r_type'.
      	(invalid_prev_frag): Add new bfd_boolean parameter `relax'.
      	All callers changed.
      	* config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field.
      	(struct nds32_hint_map): Add `option_list' field.
      	(struct suffix_name, suffix_table): Remove the unused `pic' field.
      	(do_pseudo_b, do_pseudo_bal): Remove the suffix checking.
      	(do_pseudo_la_internal, do_pseudo_pushpopm): Indent.
      	(relax_hint_bias, relax_hint_id_current): New static variables.
      	(reset_bias, relax_hint_begin): New variables.
      	(nds_itoa): New function.
      	(CLEAN_REG, GET_OPCODE): New macros.
      	(struct relax_hint_id): New.
      	(nds32_relax_hint): For .relax_hint directive, we can use `begin'
      	and `end' to mark the relax pattern without giving exactly id number.
      	(nds32_elf_append_relax_relocs): Handle the case that the .relax_hint
      	directives are attached to pseudo instruction.
      	(nds32_elf_save_pseudo_pattern): Change the second parameter from
      	instruction's opcode to byte code.
      	(nds32_elf_build_relax_relation): Add new bfd_boolean parameter
      	(nds32_lookup_pseudo_opcode): Fix the overflow issue.
      	(enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT.
      	(nds32_elf_record_fixup_exp, relax_ls_table, hint_map,
      	nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name):
      	* config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6.
      	(enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and
      	* config/tc-nds32.h (relax_ls_table): Add floating load/store
      	to gp relax pattern.
      	(hint_map, nds32_find_reloc_table): Likewise.
      	* configure.ac: Define NDS32_LINUX_TOOLCHAIN.
      	* configure: Regenerated.
      	* config.in: Regenerated.
      	* config/tc-nds32.h (enum nds32_ramp): Updated.
      	(enum nds32_relax_hint_type): Likewise.
      	* config/tc-nds32.c: Include "errno.h" and "limits.h".
      	(relax_ls_table): Add TLS relax patterns.
      	(nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on
      	each instructions of TLS patterns.
      	(nds32_elf_record_fixup_exp): Updated.
      	(nds32_apply_fix): Likewise.
      	(suffix_table): Add TLSDESC suffix.
      binutils* testsuite/binutils-all/objcopy.exp: Set the unsupported reloc number
      	from 215 to 255 for NDS32.
      bfd	* elf32-nds32.c (nds32_elf_relax_loadstore):
      	Remove the unused target features.
      	(bfd_elf32_nds32_set_target_option): Remove the unused parameters.
      	(nds32_elf_relax_piclo12, nds32_elf_relax_letlslo12,
      	nds32_elf_relax_letlsadd, nds32_elf_relax_letlsls,
      	nds32_elf_relax_pltgot_suff, nds32_elf_relax_got_suff
      	nds32_elf_relax_gotoff_suff, calculate_plt_memory_address,
      	calculate_plt_offset, calculate_got_memory_address,
      	nds32_elf_check_dup_relocs): Removed.
      	All callers changed.
      	* elf32-nds32.h: Remove the unused macros and defines.
      	(elf_nds32_link_hash_table): Remove the unused variable.
      	(bfd_elf32_nds32_set_target_option): Update prototype.
      	(nds32_elf_ex9_init): Removed.
      	* elf32-nds32.c (nds32_convert_32_to_16): Updated.
      	* elf32-nds32.c (HOWTO2, HOWTO3): Define new HOWTO macros
      	to initialize array nds32_elf_howto_table in any order
      	without lots of EMPTY_HOWTO.
      	(nds32_reloc_map): Updated.
      	* reloc.c: Add BFD_RELOC_NDS32_LSI.
      	* bfd-in2.h: Regenerated.
      	* bfd/libbfd.h: Regenerated.
      	* elf32-nds32.c (nds32_elf_relax_howto_table): Add R_NDS32_LSI.
      	(nds32_reloc_map): Likewise.
      	(nds32_elf_relax_flsi): New function.
      	(nds32_elf_relax_section): Support floating load/store relaxation.
      	* elf32-nds32.c (NDS32_GUARD_SEC_P, elf32_nds32_local_gp_offset):
      	New macro.
      	(struct elf_nds32_link_hash_entry): New `offset_to_gp' field.
      	(struct elf_nds32_obj_tdata): New `offset_to_gp' and `hdr_size' fields.
      	(elf32_nds32_allocate_local_sym_info, nds32_elf_relax_guard,
      	nds32_elf_is_target_special_symbol, nds32_elf_maybe_function_sym):
      	New functions.
      	(nds32_info_to_howto_rel): Add BFD_ASSERT.
      	(bfd_elf32_bfd_reloc_type_table_lookup, nds32_elf_link_hash_newfunc,
      	nds32_elf_link_hash_table_create, nds32_elf_relocate_section,
      	nds32_elf_relax_loadstore, nds32_elf_relax_lo12, nds32_relax_adjust_label,
      	bfd_elf32_nds32_set_target_option, nds32_fag_mark_relax): Updated.
      	(nds32_elf_final_sda_base): Improve it to find the better gp value.
      	(insert_nds32_elf_blank): Must consider `len' when inserting blanks.
      	* elf32-nds32.h (bfd_elf32_nds32_set_target_option): Update prototype.
      	(struct elf_nds32_link_hash_table): Add new variable `hyper_relax'.
      	* elf32-nds32.c (elf32_nds32_allocate_dynrelocs): New function.
      	(create_got_section): Likewise.
      	(allocate_dynrelocs, nds32_elf_size_dynamic_sections,
      	nds32_elf_relocate_section, nds32_elf_finish_dynamic_symbol): Updated.
      	(nds32_elf_check_relocs): Fix the issue that the shared library may
      	has TEXTREL entry in the dynamic section.
      	(nds32_elf_create_dynamic_sections): Enable to call readonly_dynrelocs
      	since the TEXTREL issue is fixed in the nds32_elf_check_relocs.
      	(nds32_elf_finish_dynamic_sections): Update and add DT_RELASZ
      	dynamic entry.
      	(calculate_offset): Remove the unused parameter `pic_ext_target' and
      	related codes.
      	All callers changed.
      	(elf_backend_dtrel_excludes_plt): Disable it temporarily since it
      	will cause some errors for our test cases.
      	* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Allow to link the
      	generic object.
      	* reloc.c: Add TLS relocations.
      	* libbfd.h: Regenerated.
      	* bfd-in2.h: Regenerated.
      	* elf32-nds32.h (struct section_id_list_t): New.
      	(elf32_nds32_lookup_section_id, elf32_nds32_check_relax_group,
      	elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model):
      	New prototypes.
      	(elf32_nds32_compute_jump_table_size, elf32_nds32_local_tlsdesc_gotent):
      	New macro.
      	(nds32_insertion_sort, bfd_elf32_nds32_set_target_option,
      	elf_nds32_link_hash_table): Updated.
      	* elf32-nds32.c (enum elf_nds32_tls_type): New.
      	(struct elf32_nds32_relax_group_t, struct relax_group_list_t): New.
      	(elf32_nds32_add_dynreloc, patch_tls_desc_to_ie, get_tls_type,
      	fls, ones32, list_insert, list_insert_sibling, dump_chain,
      	elf32_nds32_check_relax_group, elf32_nds32_lookup_section_id,
      	elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New functions.
      	(elf_nds32_obj_tdata): Add new fields.
      	(elf32_nds32_relax_group_ptr, nds32_elf_local_tlsdesc_gotent): New macros.
      	(nds32_elf_howto_table): Add TLS relocations.
      	(nds32_reloc_map): Likewise.
      	(nds32_elf_copy_indirect_symbol, nds32_elf_size_dynamic_sections,
      	nds32_elf_finish_dynamic_symbol, elf32_nds32_allocate_local_sym_info,
      	nds32_elf_relocate_section, bfd_elf32_nds32_set_target_option,
      	nds32_elf_check_relocs, allocate_dynrelocs): Updated.
      	(nds32_elf_relax_section): Call nds32_elf_unify_tls_model.
      	(dtpoff_base): Rename it to `gottpof' and then update it.
      opcodes	* nds32-asm.c (operand_fields): Remove the unused fields.
      	(nds32_opcodes): Remove the unused instructions.
      	* nds32-dis.c (nds32_ex9_info): Removed.
      	(nds32_parse_opcode): Updated.
      	(print_insn_nds32): Likewise.
      	* nds32-asm.c (config.h, stdlib.h, string.h): New includes.
      	(LEX_SET_FIELD, LEX_GET_FIELD): Update defines.
      	(nds32_asm_init, build_operand_hash_table, build_keyword_hash_table,
      	build_opcode_hash_table): New functions.
      	(nds32_keyword_table, nds32_keyword_count_table, nds32_field_table,
      	nds32_opcode_table): New.
      	(hw_ktabs): Declare it to a pointer rather than an array.
      	(build_hash_table): Removed.
      	* nds32-asm.h (enum): Add SYN_INPUT, SYN_OUTPUT, SYN_LOPT,
      	SYN_ROPT and upadte HW_GPR and HW_INT.
      	* nds32-dis.c (keywords): Remove const.
      	(match_field): New function.
      	(nds32_parse_opcode): Updated.
      	* disassemble.c (disassemble_init_for_target):
      	Add disassemble_init_nds32.
      	* nds32-dis.c (eum map_type): New.
      	(nds32_private_data): Likewise.
      	(get_mapping_symbol_type, is_mapping_symbol, nds32_symbol_is_valid,
      	nds32_add_opcode_hash_table, disassemble_init_nds32): New functions.
      	(print_insn_nds32): Updated.
      	* nds32-asm.c (parse_aext_reg): Add new parameter.
      	(parse_re, parse_re2, parse_aext_reg): Only reduced registers
      	are allowed to use.
      	All callers changed.
      	* nds32-asm.c (keyword_usr, keyword_sr): Updated.
      	(operand_fields): Add new fields.
      	(nds32_opcodes): Add new instructions.
      	(keyword_aridxi_mx): New keyword.
      	* nds32-asm.h (enum): Add NASM_ATTR_DSP_ISAEXT, HW_AEXT_ARIDXI_MX
      	and NASM_ATTR_ZOL.
      	(ALU2_1, ALU2_2, ALU2_3): New macros.
      	* nds32-dis.c (nds32_filter_unknown_insn): Updated.
  6. 14 Sep, 2018 1 commit
    • Alan Modra's avatar
      PR23425, unresolved symbol diagnostic · a4cd947a
      Alan Modra authored
      dwarf2.c code reasonably assumes that debug info is local to a file,
      an assumption now violated by gcc, resulting in "DWARF error: invalid
      abstract instance DIE ref" or wrong details when attempting to print
      linker error messages with file, function and line reported.
      This is because find_abstract_instance is only prepared to handle
      DW_FORM_ref_addr when the .debug_info section referenced is in the
      current file.  When that isn't the case, relocations to access another
      file's .debug_info will typically be against a symbol defined at the
      start of that .debug_info section, plus an addend.  Since the dwarf2.c
      code only considers the current file's debug info, that symbol will be
      undefined, resolving to zero.  In effect the ref_addr will wrongly
      resolve to the current file's .debug_info.
      This patch avoids the problem by treating relocations in debug
      sections against undefined symbols in a similar manner to the way
      relocations against symbols defined in discarded sections are
      resolved.  They result in a zero value (except in .debug_ranges)
      regardless of the addend.
      	PR 23425
      	* reloc.c (bfd_generic_get_relocated_section_contents): Zero reloc
      	fields in debug sections when reloc is against an undefined symbol
      	and called from bfd_simple_get_relocated_section_contents or
      	* dwarf2.c (find_abstract_instance): Return true for zero offset
      	DW_FORM_ref_addr without returning values.
  7. 31 Aug, 2018 1 commit
    • Alan Modra's avatar
      PowerPC64 higher REL16 relocations · 4a969973
      Alan Modra authored
      There are occasions where someone might want to build a 64-bit
      pc-relative offset from 16-bit pieces.  This adds the necessary REL16
      relocs corresponding to existing ADDR16 relocs that can be used to
      build 64-bit absolute values.
      	* elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
      	(R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
      	(R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
      	* reloc.c (BFD_RELOC_PPC64_REL16_HIGH, BFD_RELOC_PPC64_REL16_HIGHA),
      	* elf64-ppc.c (ppc64_elf_howto_raw): Add new REL16 howtos.
      	(ppc64_elf_reloc_type_lookup): Translate new REL16 relocs.
      	(ppc64_elf_check_relocs, ppc64_elf_relocate_section): Handle them.
      	* bfd-in2.h: Regenerate.
      	* libbfd.h: Regenerate.
      	* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Allow ADDR16
      	Group 16-bit relocs.
      	* config/tc-ppc.c (md_apply_fix): Translate those ADDR16 relocs
      	to REL16 when pcrel.  Sort relocs.
  8. 21 Aug, 2018 2 commits
    • Alan Modra's avatar
      Pack reloc_howto_struct · 706704c8
      Alan Modra authored
      This patch uses bitfields in reloc_howto_struct, reducing its size
      from 80 to 40 bytes on 64-bit hosts and from 52 to 32 bytes on 32-bit
      hosts (with a 32-bit bfd_vma).  I've also added a new "negate" field
      rather than making the encoded "size" field do double duty as both
      a size and a flag.
      There was just one use of an encoded size of 8, which according to
      bfd_get_reloc_size meant 16 bytes, in vms-alpha.c ALPHA_R_LINKAGE.
      See git commit c3d8e071 adding ALPHA_R_LINKAGE and git commit
      8612a388 decoding size 8 in bfd_get_reloc_size.  Since no other part
      of BFD handles 16 byte relocs, I've removed that encoding and special
      cased the ALPHA_R_LINKAGE size in vms-alpha.c.
      	* reloc.c (reloc_howto_type): Typedef.
      	(bfd_symbol): Delete forward declaration.
      	(struct reloc_howto_struct): Add "negate" field.  Make "size",
      	"bitsize", "rightshift", "bitpos", "complain_on_overflow",
      	"pc_relative", "partial_inplace", and "pcrel_offset" bitfields.
      	Rearrange for better packing.  Revise comments.
      	(HOWTO): Map to rearranged reloc_howto_struct.
      	(bfd_get_reloc_size): Delete now unused cases.
      	(read_reloc, write_reloc): Likewise.
      	(apply_reloc, _bfd_relocate_contents): Test howto->negate
      	rather than howto->size < 0 for negated relocation values.
      	* coff-rs6000.c (xcoff_complain_overflow_bitfield_func): Avoid
      	signed/unsigned warning.
      	(xcoff_ppc_relocate_section): Delete "condition is always false"
      	* coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
      	* cpu-ns32k.c (do_ns32k_reloc): Adjust to suit reloc_howto_struct
      	* vms-alpha.c (_bfd_vms_write_etir, alpha_vms_slurp_relocs): Use
      	size 16 for ALPHA_R_LINKAGE.
      	(alpha_howto_table <ALPHA_R_LINKAGE>): Set encoded size and
      	bitsize to zero.
      	* bfd-in.h (reloc_howto_type): Delete.
      	* bfd-in2.h: Regenerate.
    • Alan Modra's avatar
      Delete NEWHOWTO and tidy some uses of reloc_howto_struct · 487096bf
      Alan Modra authored
      NEWHOWTO was promised way back in 1991 (git commit e5683622).
      I doubt it's ever going to be implemented.  This patch removes it,
      and tidies some reloc howtos.  I was going to make some changes to
      reloc_howto_struct, so I think it's important that all relocs howtos
      are initialized with HOWTO.
      	* reloc.c (HOWTO): Revise comment.
      	* coff-arm.c (coff_arm_reloc_type_lookup): Replace const struc
      	reloc_howto_struct with reloc_howto_type.
      	* ns32knetbsd.c (MY_bfd_reloc_type_lookup): Likewise.
      	* vms-alpha.c (alpha_vms_bfd_reloc_type_lookup): Likewise.
      	* elf-hppa.h (HOW): Define.
      	(elf_hppa_howto_table): Use it to simplify this table, correcting
      	name of R_PARISC_LTOFF16WF, R_PARISC_LTOFF_FPTR64, and
      	* elf32-mep.c (MEPREL): Use HOWTO.
      	* bfd-in2.h: Regenerate.
  9. 11 Aug, 2018 2 commits
    • Alan Modra's avatar
      Factor out common relocation processing · 1dc9e2d6
      Alan Modra authored
      This patch factors out some code common to both bfd_perform_relocation
      and bfd_install_relocation, in the process fixing the omission of
      "case -1" in bfd_install_relocation.
      	* reloc.c (bfd_get_reloc_size): Sort switch.
      	(read_reloc, write_reloc, apply_reloc): New functions.
      	(bfd_perform_relocation, bfd_install_relocation): Use apply_reloc.
      	(_bfd_relocate_contents): Use read_reloc and write_reloc.
      	(_bfd_clear_contents): Likewise.
    • John Darrington's avatar
      Deal with relocations which are 3 bytes in size · 7cf9ebc6
      John Darrington authored
      	* reloc.c (_bfd_relocate_contents): Handle 3 byte relocs.
      	(_bfd_clear_contents): Likewise.
      	(bfd_perform_relocation): Likewise.
      	(bfd_install_relocation): Likewise.
  10. 05 Aug, 2018 1 commit
    • Alan Modra's avatar
      R_PPC64_REL24_NOTOC support · 05d0e962
      Alan Modra authored
      R_PPC64_REL24_NOTOC is used on calls like "bl foo@notoc" to tell the
      linker that linkage stubs for PLT calls or long branches can't use r2
      for pic addressing.  Instead, new stubs that generate pc-relative
      addresses are used.  One complication is that pc-relative offsets to
      the PLT may need to be 64-bit in large programs, in contrast to the
      toc-relative addressing used by older PLT linkage stubs where a 32-bit
      offset is sufficient until the PLT itself exceeds 2G in size.
      .eh_frame info to cover the _notoc stubs is yet to be implemented.
      	* elf64-ppc.c (ADDI_R12_R11, ADDI_R12_R12, LIS_R12),
      	(ADDIS_R12_R11, ORIS_R12_R12_0, ORI_R12_R12_0),
      	(SLDI_R12_R12_32, LDX_R12_R11_R12, ADD_R12_R11_R12): Define.
      	(ppc64_elf_howto_raw): Add R_PPC64_REL24_NOTOC entry.
      	(ppc64_elf_reloc_type_lookup): Support R_PPC64_REL24_NOTOC.
      	(ppc_stub_type): Add ppc_stub_long_branch_notoc,
      	ppc_stub_long_branch_both, ppc_stub_plt_branch_notoc,
      	ppc_stub_plt_branch_both, ppc_stub_plt_call_notoc, and
      	(is_branch_reloc): Add R_PPC64_REL24_NOTOC.
      	(build_offset, size_offset): New functions.
      	(plt_stub_size): Support plt_call_notoc and plt_call_both.
      	(ppc_build_one_stub, ppc_size_one_stub): Support new stubs.
      	(toc_adjusting_stub_needed): Handle R_PPC64_REL24_NOTOC.
      	(ppc64_elf_size_stubs): Likewise, and new stubs.
      	(ppc64_elf_build_stubs, ppc64_elf_relocate_section): Likewise.
      	* reloc.c: Add BFD_RELOC_PPC64_REL24_NOTOC.
      	* bfd-in2.h: Regenerate.
      	* libbfd.h: Regenerate.
      	* config/tc-ppc.c (ppc_elf_suffix): Support @notoc.
      	(ppc_force_relocation, ppc_fix_adjustable): Handle REL24_NOTOC.
      	* testsuite/ld-powerpc/ext.d,
      	* testsuite/ld-powerpc/ext.s,
      	* testsuite/ld-powerpc/ext.lnk,
      	* testsuite/ld-powerpc/notoc.d,
      	* testsuite/ld-powerpc/notoc.s: New tests.
      	* testsuite/ld-powerpc/powerpc.exp: Run them.
  11. 30 Jul, 2018 1 commit
    • Andrew Jenner's avatar
      Add support for the C_SKY series of processors. · b8891f8d
      Andrew Jenner authored
      This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants.  V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc.  There is support for bare-metal ELF targets and Linux with both glibc and uClibc.
      This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics.  C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers.  (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about.
      bfd     * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY.
              (BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise.
              * Makefile.in: Regenerated.
              * archures.c (enum bfd_architecture): Add bfd_arch_csky and
              related bfd_mach defines.
              (bfd_csky_arch): Declare.
              (bfd_archures_list): Add C-SKY.
              * bfd-in.h (elf32_csky_build_stubs): Declare.
              (elf32_csky_size_stubs): Declare.
              (elf32_csky_next_input_section: Declare.
              (elf32_csky_setup_section_lists): Declare.
              * bfd-in2.h: Regenerated.
              * config.bfd: Add C-SKY.
              * configure.ac: Likewise.
              * configure: Regenerated.
              * cpu-csky.c: New file.
              * elf-bfd.h (enum elf_target_id): Add C-SKY.
              * elf32-csky.c: New file.
              * libbfd.h: Regenerated.
              * reloc.c: Add C-SKY relocations.
              * targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare.
              (_bfd_target_vector): Add C-SKY target vector entries.
      binutils* readelf.c: Include elf/csky.h.
              (guess_is_rela): Handle EM_CSKY.
              (dump_relocations): Likewise.
              (get_machine_name): Likewise.
              (is_32bit_abs_reloc): Likewise.
      include  * dis-asm.h (csky_symbol_is_valid): Declare.
               * opcode/csky.h: New file.
      opcodes  * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c.
               * Makefile.in: Regenerated.
               * configure.ac: Add C-SKY.
               * configure: Regenerated.
               * csky-dis.c: New file.
               * csky-opc.h: New file.
               * disassemble.c (ARCH_csky): Define.
               (disassembler, disassemble_init_for_target): Add case for ARCH_csky.
               * disassemble.h (print_insn_csky, csky_get_disassembler): Declare.
      gas      * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY.
               (TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise.
               * Makefile.in: Regenerated.
               * config/tc-csky.c: New file.
               * config/tc-csky.h: New file.
               * config/te-csky_abiv1.h: New file.
               * config/te-csky_abiv1_linux.h: New file.
               * config/te-csky_abiv2.h: New file.
               * config/te-csky_abiv2_linux.h: New file.
               * configure.tgt: Add C-SKY.
               * doc/Makefile.am (CPU_DOCS): Add entry for C-SKY.
               * doc/Makefile.in: Regenerated.
               * doc/all.texi: Set CSKY feature.
               * doc/as.texi (Overview): Add C-SKY options.
               (Machine Dependencies): Likewise.
               * doc/c-csky.texi: New file.
               * testsuite/gas/csky/*: New test cases.
      ld      * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations.
              (ecskyelf.c, ecskyelf_linux.c): New rules.
              * Makefile.in: Regenerated.
              * configure.tgt: Add C-SKY.
              * emulparams/cskyelf.sh: New file.
              * emulparams/cskyelf_linux.sh: New file.
              * emultempl/cskyelf.em: New file.
              * gen-doc.texi: Add C-SKY.
              * ld.texi: Likewise.
              (Options specific to C-SKY targets): New section.
              * testsuite/ld-csky/*: New tests.
  12. 18 Jun, 2018 1 commit
    • Mephi's avatar
      Add support for the TLV relocation generated by LLVM for x86_64 MACH-O targets. · ed1299fe
      Mephi authored
      	PR 23297
      	* mach-o-x86-64.c (x86_64_howto_table): Add entry for
      	(bfd_mach_o_x86_64_canonicalize_one_reloc): Handle the new reloc.
      	(bfd_mach_o_x86_64_swap_reloc_out): Likewise.
      	* reloc.c (BFD_RELOC_MACH_O_X86_64_TV): New entry.
      	* bfd-in2.h: Regenerate.
      	* libbfd.h: Regenerate.
  13. 18 May, 2018 1 commit
    • John Darrington's avatar
      Add support for the Freescale s12z processor. · 7b4ae824
      John Darrington authored
      bfd	* Makefile.am: Add s12z files.
      	* Makefile.in: Regenerate.
      	* archures.c: Add bfd_s12z_arch.
      	* bfd-in.h: Add exports of bfd_putb24 and bfd_putl24.
      	* bfd-in2.h: Regenerate.
      	* config.bfd: Add s12z target.
      	* configure.ac: Add s12z target.
      	* configure: Regenerate.
      	* cpu-s12z.c: New file.
      	* elf32-s12z.c: New file.
      	* libbfd.c (bfd_putb24): New function.
      	(bfd_putl24): New function.
      	* libbfd.h: Regenerate.
      	* reloc.c: Add s12z relocations.
      	(bfd_get_reloc_size): Handle size 5 relocs.
      	* targets.c: Add s12z_elf32_vec.
      opcodes	* Makefile.am: Add support for s12z architecture.
      	* configure.ac: Likewise.
      	* disassemble.c: Likewise.
      	* disassemble.h: Likewise.
      	* Makefile.in: Regenerate.
      	* configure: Regenerate.
      	* s12z-dis.c: New file.
      	* s12z.h: New file.
      include	* elf/s12z.h: New header.
      ld	* Makefile.am: Add support for s12z architecture.
      	* configure.tgt: Likewise.
      	* Makefile.in: Regenerate.
      	* emulparams/m9s12zelf.sh: New file.
      	* scripttempl/elfm9s12z.sc: New file.
      	* testsuite/ld-discard/static.d: Expect to fail for the s12z
      	* testsuite/ld-elf/endsym.d: Likewise.
      	* testsuite/ld-elf/merge.d: Likewise.
      	* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
      	* testsuite/ld-elf/sec64k.exp: Likewise.
      	* testsuite/ld-s12z: New directory.
      	* testsuite/ld-s12z/opr-linking.d: New file.
      	* testsuite/ld-s12z/opr-linking.s: New file.
      	* testsuite/ld-s12z/relative-linking.d: New file.
      	* testsuite/ld-s12z/relative-linking.s: New file.
      	* testsuite/ld-s12z/z12s.exp: New file.
      gas	* Makefile.am: Add support for s12z target.
      	* Makefile.in: Regenerate.
      	* NEWS: Mention the new support.
      	* config/tc-s12z.c: New file.
      	* config/tc-s12z.h: New file.
      	* configure.tgt: Add  s12z support.
      	* doc/Makefile.am: Likewise.
      	* doc/Makefile.in: Regenerate.
      	* doc/all.texi: Add s12z documentation.
      	* doc/as.textinfo: Likewise.
      	* doc/c-s12z.texi: New file.
      	* testsuite/gas/s12z: New directory.
      	* testsuite/gas/s12z/abs.d: New file.
      	* testsuite/gas/s12z/abs.s: New file.
      	* testsuite/gas/s12z/adc-imm.d: New file.
      	* testsuite/gas/s12z/adc-imm.s: New file.
      	* testsuite/gas/s12z/adc-opr.d: New file.
      	* testsuite/gas/s12z/adc-opr.s: New file.
      	* testsuite/gas/s12z/add-imm.d: New file.
      	* testsuite/gas/s12z/add-imm.s: New file.
      	* testsuite/gas/s12z/add-opr.d: New file.
      	* testsuite/gas/s12z/add-opr.s: New file.
      	* testsuite/gas/s12z/and-imm.d: New file.
      	* testsuite/gas/s12z/and-imm.s: New file.
      	* testsuite/gas/s12z/and-opr.d: New file.
      	* testsuite/gas/s12z/and-opr.s: New file.
      	* testsuite/gas/s12z/and-or-cc.d: New file.
      	* testsuite/gas/s12z/and-or-cc.s: New file.
      	* testsuite/gas/s12z/bfext-special.d: New file.
      	* testsuite/gas/s12z/bfext-special.s: New file.
      	* testsuite/gas/s12z/bfext.d: New file.
      	* testsuite/gas/s12z/bfext.s: New file.
      	* testsuite/gas/s12z/bit-manip.d: New file.
      	* testsuite/gas/s12z/bit-manip.s: New file.
      	* testsuite/gas/s12z/bit.d: New file.
      	* testsuite/gas/s12z/bit.s: New file.
      	* testsuite/gas/s12z/bra-expression-defined.d: New file.
      	* testsuite/gas/s12z/bra-expression-defined.s: New file.
      	* testsuite/gas/s12z/bra-expression-undef.d: New file.
      	* testsuite/gas/s12z/bra-expression-undef.s: New file.
      	* testsuite/gas/s12z/bra.d: New file.
      	* testsuite/gas/s12z/bra.s: New file.
      	* testsuite/gas/s12z/brclr-symbols.d: New file.
      	* testsuite/gas/s12z/brclr-symbols.s: New file.
      	* testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
      	* testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
      	* testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
      	* testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
      	* testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
      	* testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
      	* testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
      	* testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
      	* testsuite/gas/s12z/clb.d: New file.
      	* testsuite/gas/s12z/clb.s: New file.
      	* testsuite/gas/s12z/clr-opr.d: New file.
      	* testsuite/gas/s12z/clr-opr.s: New file.
      	* testsuite/gas/s12z/clr.d: New file.
      	* testsuite/gas/s12z/clr.s: New file.
      	* testsuite/gas/s12z/cmp-imm.d: New file.
      	* testsuite/gas/s12z/cmp-imm.s: New file.
      	* testsuite/gas/s12z/cmp-opr-inc.d: New file.
      	* testsuite/gas/s12z/cmp-opr-inc.s: New file.
      	* testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
      	* testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
      	* testsuite/gas/s12z/cmp-opr-reg.d: New file.
      	* testsuite/gas/s12z/cmp-opr-reg.s: New file.
      	* testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
      	* testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
      	* testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
      	* testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
      	* testsuite/gas/s12z/cmp-opr-xys.d: New file.
      	* testsuite/gas/s12z/cmp-opr-xys.s: New file.
      	* testsuite/gas/s12z/cmp-s-imm.d: New file.
      	* testsuite/gas/s12z/cmp-s-imm.s: New file.
      	* testsuite/gas/s12z/cmp-s-opr.d: New file.
      	* testsuite/gas/s12z/cmp-s-opr.s: New file.
      	* testsuite/gas/s12z/cmp-xy.d: New file.
      	* testsuite/gas/s12z/cmp-xy.s: New file.
      	* testsuite/gas/s12z/com-opr.d: New file.
      	* testsuite/gas/s12z/com-opr.s: New file.
      	* testsuite/gas/s12z/complex-shifts.d: New file.
      	* testsuite/gas/s12z/complex-shifts.s: New file.
      	* testsuite/gas/s12z/db-tb-cc-opr.d: New file.
      	* testsuite/gas/s12z/db-tb-cc-opr.s: New file.
      	* testsuite/gas/s12z/db-tb-cc-reg.d: New file.
      	* testsuite/gas/s12z/db-tb-cc-reg.s: New file.
      	* testsuite/gas/s12z/dbCC.d: New file.
      	* testsuite/gas/s12z/dbCC.s: New file.
      	* testsuite/gas/s12z/dec-opr.d: New file.
      	* testsuite/gas/s12z/dec-opr.s: New file.
      	* testsuite/gas/s12z/dec.d: New file.
      	* testsuite/gas/s12z/dec.s: New file.
      	* testsuite/gas/s12z/div.d: New file.
      	* testsuite/gas/s12z/div.s: New file.
      	* testsuite/gas/s12z/eor.d: New file.
      	* testsuite/gas/s12z/eor.s: New file.
      	* testsuite/gas/s12z/exg.d: New file.
      	* testsuite/gas/s12z/exg.s: New file.
      	* testsuite/gas/s12z/ext24-ld-xy.d: New file.
      	* testsuite/gas/s12z/ext24-ld-xy.s: New file.
      	* testsuite/gas/s12z/inc-opr.d: New file.
      	* testsuite/gas/s12z/inc-opr.s: New file.
      	* testsuite/gas/s12z/inc.d: New file.
      	* testsuite/gas/s12z/inc.s: New file.
      	* testsuite/gas/s12z/inh.d: New file.
      	* testsuite/gas/s12z/inh.s: New file.
      	* testsuite/gas/s12z/jmp.d: New file.
      	* testsuite/gas/s12z/jmp.s: New file.
      	* testsuite/gas/s12z/jsr.d: New file.
      	* testsuite/gas/s12z/jsr.s: New file.
      	* testsuite/gas/s12z/ld-imm-page2.d: New file.
      	* testsuite/gas/s12z/ld-imm-page2.s: New file.
      	* testsuite/gas/s12z/ld-imm.d: New file.
      	* testsuite/gas/s12z/ld-imm.s: New file.
      	* testsuite/gas/s12z/ld-immu18.d: New file.
      	* testsuite/gas/s12z/ld-immu18.s: New file.
      	* testsuite/gas/s12z/ld-large-direct.d: New file.
      	* testsuite/gas/s12z/ld-large-direct.s: New file.
      	* testsuite/gas/s12z/ld-opr.d: New file.
      	* testsuite/gas/s12z/ld-opr.s: New file.
      	* testsuite/gas/s12z/ld-s-opr.d: New file.
      	* testsuite/gas/s12z/ld-s-opr.s: New file.
      	* testsuite/gas/s12z/ld-small-direct.d: New file.
      	* testsuite/gas/s12z/ld-small-direct.s: New file.
      	* testsuite/gas/s12z/lea-immu18.d: New file.
      	* testsuite/gas/s12z/lea-immu18.s: New file.
      	* testsuite/gas/s12z/lea.d: New file.
      	* testsuite/gas/s12z/lea.s: New file.
      	* testsuite/gas/s12z/mac.d: New file.
      	* testsuite/gas/s12z/mac.s: New file.
      	* testsuite/gas/s12z/min-max.d: New file.
      	* testsuite/gas/s12z/min-max.s: New file.
      	* testsuite/gas/s12z/mod.d: New file.
      	* testsuite/gas/s12z/mod.s: New file.
      	* testsuite/gas/s12z/mov.d: New file.
      	* testsuite/gas/s12z/mov.s: New file.
      	* testsuite/gas/s12z/mul-imm.d: New file.
      	* testsuite/gas/s12z/mul-imm.s: New file.
      	* testsuite/gas/s12z/mul-opr-opr.d: New file.
      	* testsuite/gas/s12z/mul-opr-opr.s: New file.
      	* testsuite/gas/s12z/mul-opr.d: New file.
      	* testsuite/gas/s12z/mul-opr.s: New file.
      	* testsuite/gas/s12z/mul-reg.d: New file.
      	* testsuite/gas/s12z/mul-reg.s: New file.
      	* testsuite/gas/s12z/mul.d: New file.
      	* testsuite/gas/s12z/mul.s: New file.
      	* testsuite/gas/s12z/neg-opr.d: New file.
      	* testsuite/gas/s12z/neg-opr.s: New file.
      	* testsuite/gas/s12z/not-so-simple-shifts.d: New file.
      	* testsuite/gas/s12z/not-so-simple-shifts.s: New file.
      	* testsuite/gas/s12z/opr-18u.d: New file.
      	* testsuite/gas/s12z/opr-18u.s: New file.
      	* testsuite/gas/s12z/opr-expr.d: New file.
      	* testsuite/gas/s12z/opr-expr.s: New file.
      	* testsuite/gas/s12z/opr-ext-18.d: New file.
      	* testsuite/gas/s12z/opr-ext-18.s: New file.
      	* testsuite/gas/s12z/opr-idx-24-reg.d: New file.
      	* testsuite/gas/s12z/opr-idx-24-reg.s: New file.
      	* testsuite/gas/s12z/opr-idx3-reg.d: New file.
      	* testsuite/gas/s12z/opr-idx3-reg.s: New file.
      	* testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
      	* testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
      	* testsuite/gas/s12z/opr-indirect-expr.d: New file.
      	* testsuite/gas/s12z/opr-indirect-expr.s: New file.
      	* testsuite/gas/s12z/opr-symbol.d: New file.
      	* testsuite/gas/s12z/opr-symbol.s: New file.
      	* testsuite/gas/s12z/or-imm.d: New file.
      	* testsuite/gas/s12z/or-imm.s: New file.
      	* testsuite/gas/s12z/or-opr.d: New file.
      	* testsuite/gas/s12z/or-opr.s: New file.
      	* testsuite/gas/s12z/p2-mul.d: New file.
      	* testsuite/gas/s12z/p2-mul.s: New file.
      	* testsuite/gas/s12z/page2-inh.d: New file.
      	* testsuite/gas/s12z/page2-inh.s: New file.
      	* testsuite/gas/s12z/psh-pul.d: New file.
      	* testsuite/gas/s12z/psh-pul.s: New file.
      	* testsuite/gas/s12z/qmul.d: New file.
      	* testsuite/gas/s12z/qmul.s: New file.
      	* testsuite/gas/s12z/rotate.d: New file.
      	* testsuite/gas/s12z/rotate.s: New file.
      	* testsuite/gas/s12z/s12z.exp: New file.
      	* testsuite/gas/s12z/sat.d: New file.
      	* testsuite/gas/s12z/sat.s: New file.
      	* testsuite/gas/s12z/sbc-imm.d: New file.
      	* testsuite/gas/s12z/sbc-imm.s: New file.
      	* testsuite/gas/s12z/sbc-opr.d: New file.
      	* testsuite/gas/s12z/sbc-opr.s: New file.
      	* testsuite/gas/s12z/shift.d: New file.
      	* testsuite/gas/s12z/shift.s: New file.
      	* testsuite/gas/s12z/simple-shift.d: New file.
      	* testsuite/gas/s12z/simple-shift.s: New file.
      	* testsuite/gas/s12z/single-ops.d: New file.
      	* testsuite/gas/s12z/single-ops.s: New file.
      	* testsuite/gas/s12z/specd6.d: New file.
      	* testsuite/gas/s12z/specd6.s: New file.
      	* testsuite/gas/s12z/st-large-direct.d: New file.
      	* testsuite/gas/s12z/st-large-direct.s: New file.
      	* testsuite/gas/s12z/st-opr.d: New file.
      	* testsuite/gas/s12z/st-opr.s: New file.
      	* testsuite/gas/s12z/st-s-opr.d: New file.
      	* testsuite/gas/s12z/st-s-opr.s: New file.
      	* testsuite/gas/s12z/st-small-direct.d: New file.
      	* testsuite/gas/s12z/st-small-direct.s: New file.
      	* testsuite/gas/s12z/st-xy.d: New file.
      	* testsuite/gas/s12z/st-xy.s: New file.
      	* testsuite/gas/s12z/sub-imm.d: New file.
      	* testsuite/gas/s12z/sub-imm.s: New file.
      	* testsuite/gas/s12z/sub-opr.d: New file.
      	* testsuite/gas/s12z/sub-opr.s: New file.
      	* testsuite/gas/s12z/tfr.d: New file.
      	* testsuite/gas/s12z/tfr.s: New file.
      	* testsuite/gas/s12z/trap.d: New file.
      	* testsuite/gas/s12z/trap.s: New file.
      binutils* readelf.c: Add support for s12z architecture.
      	* testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z
  14. 25 Apr, 2018 2 commits
    • Christophe Lyon's avatar
      [ARM] Add TLS relocations for FDPIC. · 5c5a4843
      Christophe Lyon authored
      Define and handle TLS relocations for FDPIC in BFD and gas.
      In gas, the new relocations are rejected if the --fdpic option was not
      We also define the __tdata_start symbol to mark the start of the
      .tdata section. This allows FDPIC static binaries to find the start of
      .tdata section, since phdr->p_vaddr of TLS segment is not a valid
      value for FDPIC.
      2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
      	Mickaël Guêné  <mickael.guene@st.com>
      	* bfd-in2.h (BFD_RELOC_ARM_TLS_GD32_FDPIC)
      	* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_TLS_GD32_FDPIC,
      	R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC relocations.
      	(elf32_arm_reloc_map): Add R_ARM_TLS_GD32_FDPIC,
      	(struct elf32_arm_link_hash_table): Update comment.
      	(elf32_arm_final_link_relocate): Handle TLS FDPIC relocations.
      	(IS_ARM_TLS_RELOC): Likewise.
      	(elf32_arm_check_relocs): Likewise.
      	(allocate_dynrelocs_for_symbol): Likewise.
      	(elf32_arm_size_dynamic_sections): Update comment.
      	* reloc.c: Add BFD_RELOC_ARM_TLS_GD32_FDPIC,
      	* config/tc-arm.c (reloc_names): Add TLSGD_FDPIC, TLSLDM_FDPIC,
      	GOTTPOFF_FDIC relocations.
      	(md_apply_fix): Handle the new TLS FDPIC relocations.
      	(tc_gen_reloc): Likewise.
      	(arm_fix_adjustable): Likewise.
      	* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
      	* scripttempl/elf.sc: Define __tdata_start for .tdata section.
    • Christophe Lyon's avatar
      [ARM] Add FDPIC relocations definitions · 188fd7ae
      Christophe Lyon authored
      Add FDPIC relocation definitions in BFD and gas.
      Gas rejects them if the --fdpic option was not specified.
      2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
      	Mickaël Guêné  <mickael.guene@st.com>
      	* bfd-in2.c (BFD_RELOC_ARM_GOTFUNCDESC)
      	* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_GOTFUNCDESC,
      	(elf32_arm_howto_from_type): Take new members of
      	elf32_arm_howto_table_2 into account.
      	(elf32_arm_reloc_map): Add BFD_RELOC_ARM_GOTFUNCDESC,
      	* reloc.c: Add BFD_RELOC_ARM_GOTFUNCDESC,
      	* config/tc-arm.c (reloc_names): Add gotfuncdesc, gotofffuncdesc,
      	(md_apply_fix): Support the new relocations.
      	(tc_gen_reloc): Likewise.
      	* testsuite/gas/arm/reloc-fdpic.d: New.
      	* testsuite/gas/arm/reloc-fdpic.s: New.
      	(R_ARM_FUNCDESC_VALUE): Define new relocations.
  15. 17 Apr, 2018 1 commit
    • Michael Eager's avatar
      [MicroBlaze] PIC data text relative · 3f0a5f17
      Michael Eager authored
      Andrew Sadek <andrew.sadek.se@gmail.com>
      A new implemented feature in GCC Microblaze that allows Position
      Independent Code to run using Data Text Relative addressing instead
      of using Global Offset Table.
      Its aim was to make 'PIC' more efficient and flexible as elf size
      excess performance overhead were noticed when using GOT due to the
      indirect addressing.
      	* bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
      	* elf/microblaze.h (Add 3 new relocations):
      	and R_MICROBLAZE_TEXTREL_32_LO for relax function.
      	* bfd/reloc.c (2 new BFD relocations):
      	* bfd/bfd-in2.h: Regenerate
      	* bfd/libbfd.h: Regenerate
      	* bfd/elf32-microblaze.c (Handle new relocs): define 'HOWTO' of 3
      	new relocs and handle them in both relocate and relax functions.
      	(microblaze_elf_reloc_type_lookup): add mapping between for new
      	bfd relocs.
      	(microblaze_elf_relocate_section): Handle new relocs in case of
      	elf relocation.
      	(microblaze_elf_relax_section): Handle new relocs for elf relaxation.
      	* gas/config/tc-microblaze.c (Handle new relocs directives in
      	assembler): Handle new relocs from compiler output.
      	(imm_types): add new imm types for data text relative addressing
      	(md_convert_frag): conversion for BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
      	(md_apply_fix): apply fix for BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
      	(md_estimate_size_before_relax): estimate size for
      	(tc_gen_reloc): generate relocations for
      	* ld/lexsup.c (Add 2 ld options):
      	(ld_options): add disable-multiple-abs-defs @ 'ld_options' array
      	(parse_args): parse new option and pass flag to 'link_info' struct.
      	* ld/ldlex.h (Add enum): add new enum @ 'option_values' enum.
      	* ld/ld.texinfo (Add new option): Add description for
      	* ld/main.c: Initialize flags with false @ 'main'. Handle
      	disable-multiple-abs-defs @ 'mutiple_definition'.
  16. 16 Apr, 2018 1 commit
    • Alan Modra's avatar
      Remove m88k support · c2bf1eec
      Alan Modra authored
      	* coff/internal.h: Remove m88k support.
      	* coff/m88k.h: Delete.
      	* opcode/m88k.h: Delete.
      	* Makefile.am: Remove m88k support.
      	* aoutx.h: Likewise.
      	* archures.c: Likewise.
      	* coffcode.h: Likewise.
      	* coffswap.h: Likewise.
      	* config.bfd: Likewise.
      	* configure.ac: Likewise.
      	* cpu-ns32k.c: Likewise.
      	* elf32-nds32.c: Likewise.
      	* mach-o.c: Likewise.
      	* netbsd-core.c: Likewise.
      	* reloc.c: Likewise.
      	* targets.c: Likewise.
      	* coff-m88k.c: Delete.
      	* cpu-m88k.c: Delete.
      	* elf32-m88k.c: Delete.
      	* hosts/m88kmach3.h: Delete.
      	* m88kmach3.c: Delete.
      	* m88kopenbsd.c: Delete.
      	* Makefile.in: Regenerate.
      	* bfd-in2.h: Regenerate.
      	* configure: Regenerate.
      	* po/SRC-POTFILES.in: Regenerate.
      	* Makefile.am: Remove m88k support.
      	* configure.ac: Likewise.
      	* disassemble.c: Likewise.
      	* disassemble.h: Likewise.
      	* m88k-dis.c: Delete.
      	* Makefile.in: Regenerate.
      	* configure: Regenerate.
      	* po/POTFILES.in: Regenerate.
      	* MAINTAINERS (Mark Kettenis): Move to past maintainers.
      	* testsuite/binutils-all/objdump.exp: Remove m88k support.
      	* configure.ac: Remove m88k support.
      	* config.in: Regenerate.
      	* configure: Regenerate.
      	* Makefile.am: Remove m88k support.
      	* configure.host: Likewise.
      	* configure.tgt: Likewise.
      	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
      	* emulparams/m88kbcs.sh: Delete.
      	* scripttempl/m88kbcs.sc: Delete.
      	* Makefile.in: Regenerate.
      	* po/BLD-POTFILES.in: Regenerate.
  17. 11 Apr, 2018 1 commit
    • Alan Modra's avatar
      Remove i860, i960, bout and aout-adobe targets · a8eb42a8
      Alan Modra authored
      Plus remove a few leftovers from the 29k support.
      	* aout/adobe.h: Delete.
      	* aout/reloc.h: Delete.
      	* coff/i860.h: Delete.
      	* coff/i960.h: Delete.
      	* elf/i860.h: Delete.
      	* elf/i960.h: Delete.
      	* opcode/i860.h: Delete.
      	* opcode/i960.h: Delete.
      	* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
      	* aout/ar.h (ARMAGB): Remove.
      	* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
      	union internal_auxent): Remove i960 support.
      	* aout-adobe.c: Delete.
      	* bout.c: Delete.
      	* coff-i860.c: Delete.
      	* coff-i960.c: Delete.
      	* cpu-i860.c: Delete.
      	* cpu-i960.c: Delete.
      	* elf32-i860.c: Delete.
      	* elf32-i960.c: Delete.
      	* hosts/i860mach3.h: Delete.
      	* Makefile.am: Remove i860, i960, bout, and adobe support.
      	* archures.c: Remove i860 and i960 support.
      	* coffcode.h: Likewise.
      	* reloc.c: Likewise.
      	* aoutx.h: Comment updates.
      	* archive.c: Remove BOUT and i960 support.
      	* bfd.c: Remove BOUT support.
      	* coffswap.h: Remove i960 support.
      	* config.bfd: Remove i860, i960 and adobe targets.
      	* configure.ac: Remove adode, bout, i860, i960, icoff targets.
      	* targets.c: Likewise.
      	* ieee.c: Remove i960 support.
      	* mach-o.c: Remove i860 support.
      	* Makefile.in: Regenerate.
      	* bfd-in2.h: Regenerate.
      	* configure: Regenerate.
      	* libbfd.h: Regenerate.
      	* po/SRC-POTFILES.in: Regenerate.
      	* opcodes/i860-dis.c: Delete.
      	* opcodes/i960-dis.c: Delete.
      	* Makefile.am: Remove i860 and i960 support.
      	* configure.ac: Likewise.
      	* disassemble.c: Likewise.
      	* disassemble.h: Likewise.
      	* Makefile.in: Regenerate.
      	* configure: Regenerate.
      	* po/POTFILES.in: Regenerate.
      	* ieee.c: Remove i960 support.
      	* od-macho.c: Remove i860 support.
      	* readelf.c: Remove i860 and i960 support.
      	* testsuite/binutils-all/objcopy.exp: Likewise.
      	* testsuite/binutils-all/objdump.exp: Likewise.
      	* testsuite/lib/binutils-common.exp: Likewise.
      	* config/aout_gnu.h: Delete.
      	* config/tc-i860.c: Delete.
      	* config/tc-i860.h: Delete.
      	* config/tc-i960.c: Delete.
      	* config/tc-i960.h: Delete.
      	* doc/c-i860.texi: Delete.
      	* doc/c-i960.texi: Delete.
      	* testsuite/gas/i860/README.i860: Delete.
      	* testsuite/gas/i860/bitwise.d: Delete.
      	* testsuite/gas/i860/bitwise.s: Delete.
      	* testsuite/gas/i860/branch.d: Delete.
      	* testsuite/gas/i860/branch.s: Delete.
      	* testsuite/gas/i860/bte.d: Delete.
      	* testsuite/gas/i860/bte.s: Delete.
      	* testsuite/gas/i860/dir-align01.d: Delete.
      	* testsuite/gas/i860/dir-align01.s: Delete.
      	* testsuite/gas/i860/dir-intel01.d: Delete.
      	* testsuite/gas/i860/dir-intel01.s: Delete.
      	* testsuite/gas/i860/dir-intel02.d: Delete.
      	* testsuite/gas/i860/dir-intel02.s: Delete.
      	* testsuite/gas/i860/dir-intel03-err.l: Delete.
      	* testsuite/gas/i860/dir-intel03-err.s: Delete.
      	* testsuite/gas/i860/dual01.d: Delete.
      	* testsuite/gas/i860/dual01.s: Delete.
      	* testsuite/gas/i860/dual02-err.l: Delete.
      	* testsuite/gas/i860/dual02-err.s: Delete.
      	* testsuite/gas/i860/dual03.d: Delete.
      	* testsuite/gas/i860/dual03.s: Delete.
      	* testsuite/gas/i860/fldst01.d: Delete.
      	* testsuite/gas/i860/fldst01.s: Delete.
      	* testsuite/gas/i860/fldst02.d: Delete.
      	* testsuite/gas/i860/fldst02.s: Delete.
      	* testsuite/gas/i860/fldst03.d: Delete.
      	* testsuite/gas/i860/fldst03.s: Delete.
      	* testsuite/gas/i860/fldst04.d: Delete.
      	* testsuite/gas/i860/fldst04.s: Delete.
      	* testsuite/gas/i860/fldst05.d: Delete.
      	* testsuite/gas/i860/fldst05.s: Delete.
      	* testsuite/gas/i860/fldst06.d: Delete.
      	* testsuite/gas/i860/fldst06.s: Delete.
      	* testsuite/gas/i860/fldst07.d: Delete.
      	* testsuite/gas/i860/fldst07.s: Delete.
      	* testsuite/gas/i860/fldst08.d: Delete.
      	* testsuite/gas/i860/fldst08.s: Delete.
      	* testsuite/gas/i860/float01.d: Delete.
      	* testsuite/gas/i860/float01.s: Delete.
      	* testsuite/gas/i860/float02.d: Delete.
      	* testsuite/gas/i860/float02.s: Delete.
      	* testsuite/gas/i860/float03.d: Delete.
      	* testsuite/gas/i860/float03.s: Delete.
      	* testsuite/gas/i860/float04.d: Delete.
      	* testsuite/gas/i860/float04.s: Delete.
      	* testsuite/gas/i860/form.d: Delete.
      	* testsuite/gas/i860/form.s: Delete.
      	* testsuite/gas/i860/i860.exp: Delete.
      	* testsuite/gas/i860/iarith.d: Delete.
      	* testsuite/gas/i860/iarith.s: Delete.
      	* testsuite/gas/i860/ldst01.d: Delete.
      	* testsuite/gas/i860/ldst01.s: Delete.
      	* testsuite/gas/i860/ldst02.d: Delete.
      	* testsuite/gas/i860/ldst02.s: Delete.
      	* testsuite/gas/i860/ldst03.d: Delete.
      	* testsuite/gas/i860/ldst03.s: Delete.
      	* testsuite/gas/i860/ldst04.d: Delete.
      	* testsuite/gas/i860/ldst04.s: Delete.
      	* testsuite/gas/i860/ldst05.d: Delete.
      	* testsuite/gas/i860/ldst05.s: Delete.
      	* testsuite/gas/i860/ldst06.d: Delete.
      	* testsuite/gas/i860/ldst06.s: Delete.
      	* testsuite/gas/i860/pfam.d: Delete.
      	* testsuite/gas/i860/pfam.s: Delete.
      	* testsuite/gas/i860/pfmam.d: Delete.
      	* testsuite/gas/i860/pfmam.s: Delete.
      	* testsuite/gas/i860/pfmsm.d: Delete.
      	* testsuite/gas/i860/pfmsm.s: Delete.
      	* testsuite/gas/i860/pfsm.d: Delete.
      	* testsuite/gas/i860/pfsm.s: Delete.
      	* testsuite/gas/i860/pseudo-ops01.d: Delete.
      	* testsuite/gas/i860/pseudo-ops01.s: Delete.
      	* testsuite/gas/i860/regress01.d: Delete.
      	* testsuite/gas/i860/regress01.s: Delete.
      	* testsuite/gas/i860/shift.d: Delete.
      	* testsuite/gas/i860/shift.s: Delete.
      	* testsuite/gas/i860/simd.d: Delete.
      	* testsuite/gas/i860/simd.s: Delete.
      	* testsuite/gas/i860/system.d: Delete.
      	* testsuite/gas/i860/system.s: Delete.
      	* testsuite/gas/i860/xp.d: Delete.
      	* testsuite/gas/i860/xp.s: Delete.
      	* Makefile.am: Remove i860 and i960 support.
      	* configure.tgt: Likewise.
      	* doc/Makefile.am: Likewise.
      	* doc/all.texi: Likewise.
      	* testsuite/gas/all/gas.exp
      	* config/obj-coff.h: Remove i960 support.
      	* doc/internals.texi: Likewise.
      	* expr.c: Likewise.
      	* read.c: Likewise.
      	* write.c: Likewise.
      	* write.h: Likewise.
      	* testsuite/gas/lns/lns.exp: Likewise.
      	* testsuite/gas/symver/symver.exp: Likewise.
      	* config/tc-m68k.c: Remove BOUT support.
      	* config/tc-score.c: Likewise.
      	* config/tc-score7.c: Likewise.
      	* config/tc-sparc.c: Likewise.
      	* symbols.c: Likewise.
      	* doc/h8.texi: Likewise.
      	* configure.ac: Remove BOUT and i860 support.
      	* doc/as.texinfo: Remove BOUT, i860 and i960 support
      	* Makefile.in: Regenerate.
      	* config.in: Regenerate.
      	* configure: Regenerate.
      	* doc/Makefile.in: Regenerate.
      	* po/POTFILES.in: Regenerate.
      	* emulparams/coff_i860.sh: Delete.
      	* emulparams/elf32_i860.sh: Delete.
      	* emulparams/elf32_i960.sh: Delete.
      	* emulparams/gld960.sh: Delete.
      	* emulparams/gld960coff.sh: Delete.
      	* emulparams/lnk960.sh: Delete.
      	* emultempl/gld960.em: Delete.
      	* emultempl/gld960c.em: Delete.
      	* emultempl/lnk960.em: Delete.
      	* scripttempl/i860coff.sc: Delete.
      	* scripttempl/i960.sc: Delete.
      	* ld.texinfo: Remove i960 support.
      	* Makefile.am: Remove i860 and i960 support.
      	* configure.tgt: Likewise.
      	* testsuite/ld-discard/extern.d: Likewise.
      	* testsuite/ld-discard/start.d: Likewise.
      	* testsuite/ld-discard/static.d: Likewise.
      	* testsuite/ld-elf/compressed1d.d: Likewise.
      	* testsuite/ld-elf/group1.d: Likewise.
      	* testsuite/ld-elf/group3b.d: Likewise.
      	* testsuite/ld-elf/group8a.d: Likewise.
      	* testsuite/ld-elf/group8b.d: Likewise.
      	* testsuite/ld-elf/group9a.d: Likewise.
      	* testsuite/ld-elf/group9b.d: Likewise.
      	* testsuite/ld-elf/linkonce2.d: Likewise.
      	* testsuite/ld-elf/merge.d: Likewise.
      	* testsuite/ld-elf/merge2.d: Likewise.
      	* testsuite/ld-elf/merge3.d: Likewise.
      	* testsuite/ld-elf/orphan-10.d: Likewise.
      	* testsuite/ld-elf/orphan-11.d: Likewise.
      	* testsuite/ld-elf/orphan-12.d: Likewise.
      	* testsuite/ld-elf/orphan-9.d: Likewise.
      	* testsuite/ld-elf/orphan-region.d: Likewise.
      	* testsuite/ld-elf/orphan.d: Likewise.
      	* testsuite/ld-elf/orphan3.d: Likewise.
      	* testsuite/ld-elf/pr12851.d: Likewise.
      	* testsuite/ld-elf/pr12975.d: Likewise.
      	* testsuite/ld-elf/pr13177.d: Likewise.
      	* testsuite/ld-elf/pr13195.d: Likewise.
      	* testsuite/ld-elf/pr17550a.d: Likewise.
      	* testsuite/ld-elf/pr17550b.d: Likewise.
      	* testsuite/ld-elf/pr17550c.d: Likewise.
      	* testsuite/ld-elf/pr17550d.d: Likewise.
      	* testsuite/ld-elf/pr17615.d: Likewise.
      	* testsuite/ld-elf/pr20528a.d: Likewise.
      	* testsuite/ld-elf/pr20528b.d: Likewise.
      	* testsuite/ld-elf/pr21562a.d: Likewise.
      	* testsuite/ld-elf/pr21562b.d: Likewise.
      	* testsuite/ld-elf/pr21562c.d: Likewise.
      	* testsuite/ld-elf/pr21562d.d: Likewise.
      	* testsuite/ld-elf/pr21562i.d: Likewise.
      	* testsuite/ld-elf/pr21562j.d: Likewise.
      	* testsuite/ld-elf/pr21562k.d: Likewise.
      	* testsuite/ld-elf/pr21562l.d: Likewise.
      	* testsuite/ld-elf/pr21562m.d: Likewise.
      	* testsuite/ld-elf/pr21562n.d: Likewise.
      	* testsuite/ld-elf/pr22677.d: Likewise.
      	* testsuite/ld-elf/pr22836-1a.d: Likewise.
      	* testsuite/ld-elf/pr22836-1b.d: Likewise.
      	* testsuite/ld-elf/pr349.d: Likewise.
      	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
      	* testsuite/ld-elf/sec64k.exp: Likewise.
      	* testsuite/ld-elf/warn1.d: Likewise.
      	* testsuite/ld-elf/warn2.d: Likewise.
      	* testsuite/ld-elf/warn3.d: Likewise.
      	* testsuite/lib/ld-lib.exp: Likewise.
      	* Makefile.in: Regenerate.
      	* po/BLD-POTFILES.in: Regenerate.
  18. 28 Mar, 2018 1 commit
    • Renlin Li's avatar
      [1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in GAS. · 84f1b9fb
      Renlin Li authored
      This patch adds the following relocation support into binutils gas.
      Those relocations includes both ip64 and ilp32 variant.
  19. 25 Feb, 2018 2 commits
    • Alan Modra's avatar
      BFD messages · 6e05870c
      Alan Modra authored
      	* archive.c, * bfd.c, * linker.c, * reloc.c, * stabs.c,
      	* syms.c: Standardize error/warning messages.
      	* testsuite/binutils-all/mips/mips-reginfo-n32.d,
      	* testsuite/binutils-all/mips/mips-reginfo.d: Update.
      	* testsuite/gas/mips/reginfo-2.l: Update.
      	* testsuite/ld-arm/cmse-implib-errors.out,
      	* testsuite/ld-arm/cmse-new-earlier-later-implib.out,
      	* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out,
      	* testsuite/ld-arm/cmse-new-wrong-implib.out,
      	* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out,
      	* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out,
      	* testsuite/ld-cris/badgotr1.d,
      	* testsuite/ld-cris/tls-err-24.d,
      	* testsuite/ld-cris/tls-err-25.d,
      	* testsuite/ld-cris/tls-err-26.d,
      	* testsuite/ld-cris/tls-err-27.d,
      	* testsuite/ld-cris/tls-err-28.d,
      	* testsuite/ld-cris/tls-err-40.d,
      	* testsuite/ld-cris/tls-err-44.d,
      	* testsuite/ld-cris/tls-err-48.d,
      	* testsuite/ld-cris/tls-err-52.d,
      	* testsuite/ld-cris/tls-err-53.d,
      	* testsuite/ld-cris/tls-err-55.d,
      	* testsuite/ld-cris/tls-err-56.d,
      	* testsuite/ld-cris/tls-err-62.d,
      	* testsuite/ld-cris/tls-err-65.d,
      	* testsuite/ld-cris/tls-err-77.d,
      	* testsuite/ld-elf/empty-implib.out,
      	* testsuite/ld-elf/indirect.exp: Update.
    • Alan Modra's avatar
      unrecognized/unsupported reloc message · 0aa13fee
      Alan Modra authored
      It must get boring translating all the variants we have of
      unrecognized/unsupported/invalid/unexpected reloc number.  This patch
      cuts down on the number of variations.
      	* aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c,
      	* coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c,
      	* coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c,
      	* elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c,
      	* elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c,
      	* elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
      	* elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c,
      	* elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c,
      	* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
      	* elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c,
      	* elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c,
      	* elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c,
      	* elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c,
      	* elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
      	* elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c,
      	* elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c,
      	* elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
      	* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
      	* elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
      	* elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h,
      	* elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize
      	unrecognized/unsupported reloc message.
  20. 19 Feb, 2018 2 commits
    • Alan Modra's avatar
      Use %pI, %pR, %pS, %pT in place of %I, %R, %S and %T. · c1c8c1ef
      Alan Modra authored
      	* elf32-arm.c, * elf32-hppa.c, * elf32-lm32.c, * elf32-m32r.c,
      	* elf32-metag.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-ppc.c,
      	* elf32-s390.c, * elf32-sh.c, * elf32-tic6x.c, * elf32-tilepro.c,
      	* elf64-ppc.c, * elf64-s390.c, * elflink.c, * elfnn-aarch64.c,
      	* elfnn-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c,
      	* reloc.c: Replace use of %R and %T in format strings passed to
      	einfo and friends by %pR and %pT.
      	* ldmisc.c (vfinfo) Handle %pI, %pR, %pS and %pT in place of
      	%I, %R, %S and %T.
      	* ldcref.c, * ldctor.c, * ldemul.c, * ldexp.c, * ldgram.y,
      	* ldlang.c, * ldlex.l, * ldmain.c, * ldmisc.c, * pe-dll.c,
      	* emultempl/sh64elf.em: Replace use of of %I, %R, %S and %T in
      	format strings passed to einfo and friends by %pI, %pR, %pS and %pT.
    • Alan Modra's avatar
      Use %pA and %pB in messages rather than %A and %B · 871b3ab2
      Alan Modra authored
      First step towards compiler verification of _bfd_error_handler
      arguments, and better verification of translated messages.
      	* bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place
      	of %A and %B.
      	* aout-adobe.c: Update all messages using %A and %B.
      	* aout-cris.c: Likewise.
      	* aoutx.h: Likewise.
      	* archive.c: Likewise.
      	* binary.c: Likewise.
      	* cache.c: Likewise.
      	* coff-alpha.c: Likewise.
      	* coff-arm.c: Likewise.
      	* coff-i860.c: Likewise.
      	* coff-mcore.c: Likewise.
      	* coff-ppc.c: Likewise.
      	* coff-rs6000.c: Likewise.
      	* coff-sh.c: Likewise.
      	* coff-tic4x.c: Likewise.
      	* coff-tic54x.c: Likewise.
      	* coff-tic80.c: Likewise.
      	* coff64-rs6000.c: Likewise.
      	* coffcode.h: Likewise.
      	* coffgen.c: Likewise.
      	* cofflink.c: Likewise.
      	* coffswap.h: Likewise.
      	* compress.c: Likewise.
      	* cpu-arm.c: Likewise.
      	* ecoff.c: Likewise.
      	* elf-attrs.c: Likewise.
      	* elf-eh-frame.c: Likewise.
      	* elf-ifunc.c: Likewise.
      	* elf-m10300.c: Likewise.
      	* elf-properties.c: Likewise.
      	* elf-s390-common.c: Likewise.
      	* elf.c: Likewise.
      	* elf32-arc.c: Likewise.
      	* elf32-arm.c: Likewise.
      	* elf32-avr.c: Likewise.
      	* elf32-bfin.c: Likewise.
      	* elf32-cr16.c: Likewise.
      	* elf32-cr16c.c: Likewise.
      	* elf32-cris.c: Likewise.
      	* elf32-crx.c: Likewise.
      	* elf32-d10v.c: Likewise.
      	* elf32-d30v.c: Likewise.
      	* elf32-epiphany.c: Likewise.
      	* elf32-fr30.c: Likewise.
      	* elf32-frv.c: Likewise.
      	* elf32-gen.c: Likewise.
      	* elf32-hppa.c: Likewise.
      	* elf32-i370.c: Likewise.
      	* elf32-i386.c: Likewise.
      	* elf32-i960.c: Likewise.
      	* elf32-ip2k.c: Likewise.
      	* elf32-iq2000.c: Likewise.
      	* elf32-lm32.c: Likewise.
      	* elf32-m32c.c: Likewise.
      	* elf32-m32r.c: Likewise.
      	* elf32-m68hc11.c: Likewise.
      	* elf32-m68hc12.c: Likewise.
      	* elf32-m68hc1x.c: Likewise.
      	* elf32-m68k.c: Likewise.
      	* elf32-mcore.c: Likewise.
      	* elf32-mep.c: Likewise.
      	* elf32-metag.c: Likewise.
      	* elf32-microblaze.c: Likewise.
      	* elf32-moxie.c: Likewise.
      	* elf32-msp430.c: Likewise.
      	* elf32-mt.c: Likewise.
      	* elf32-nds32.c: Likewise.
      	* elf32-nios2.c: Likewise.
      	* elf32-or1k.c: Likewise.
      	* elf32-pj.c: Likewise.
      	* elf32-ppc.c: Likewise.
      	* elf32-rl78.c: Likewise.
      	* elf32-rx.c: Likewise.
      	* elf32-s390.c: Likewise.
      	* elf32-score.c: Likewise.
      	* elf32-score7.c: Likewise.
      	* elf32-sh-symbian.c: Likewise.
      	* elf32-sh.c: Likewise.
      	* elf32-sh64.c: Likewise.
      	* elf32-sparc.c: Likewise.
      	* elf32-spu.c: Likewise.
      	* elf32-tic6x.c: Likewise.
      	* elf32-tilepro.c: Likewise.
      	* elf32-v850.c: Likewise.
      	* elf32-vax.c: Likewise.
      	* elf32-visium.c: Likewise.
      	* elf32-wasm32.c: Likewise.
      	* elf32-xgate.c: Likewise.
      	* elf32-xtensa.c: Likewise.
      	* elf64-alpha.c: Likewise.
      	* elf64-gen.c: Likewise.
      	* elf64-hppa.c: Likewise.
      	* elf64-ia64-vms.c: Likewise.
      	* elf64-mmix.c: Likewise.
      	* elf64-ppc.c: Likewise.
      	* elf64-s390.c: Likewise.
      	* elf64-sh64.c: Likewise.
      	* elf64-sparc.c: Likewise.
      	* elf64-x86-64.c: Likewise.
      	* elfcode.h: Likewise.
      	* elfcore.h: Likewise.
      	* elflink.c: Likewise.
      	* elfnn-aarch64.c: Likewise.
      	* elfnn-ia64.c: Likewise.
      	* elfnn-riscv.c: Likewise.
      	* elfxx-mips.c: Likewise.
      	* elfxx-sparc.c: Likewise.
      	* elfxx-tilegx.c: Likewise.
      	* elfxx-x86.c: Likewise.
      	* hpux-core.c: Likewise.
      	* ieee.c: Likewise.
      	* ihex.c: Likewise.
      	* libbfd.c: Likewise.
      	* linker.c: Likewise.
      	* mach-o.c: Likewise.
      	* merge.c: Likewise.
      	* mmo.c: Likewise.
      	* oasys.c: Likewise.
      	* pdp11.c: Likewise.
      	* pe-mips.c: Likewise.
      	* peXXigen.c: Likewise.
      	* peicode.h: Likewise.
      	* reloc.c: Likewise.
      	* rs6000-core.c: Likewise.
      	* srec.c: Likewise.
      	* stabs.c: Likewise.
      	* vms-alpha.c: Likewise.
      	* xcofflink.c: Likewise.
      	* ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B.
      	* ldcref.c: Update all messages using %A and %B.
      	* ldexp.c: Likewise.
      	* ldlang.c: Likewise.
      	* ldmain.c: Likewise.
      	* ldmisc.c: Likewise.
      	* pe-dll.c: Likewise.
      	* plugin.c: Likewise.
      	* emultempl/beos.em: Likewise.
      	* emultempl/cr16elf.em: Likewise.
      	* emultempl/elf32.em: Likewise.
      	* emultempl/m68kcoff.em: Likewise.
      	* emultempl/m68kelf.em: Likewise.
      	* emultempl/mmo.em: Likewise.
      	* emultempl/nds32elf.em: Likewise.
      	* emultempl/pe.em: Likewise.
      	* emultempl/pep.em: Likewise.
      	* emultempl/spuelf.em: Likewise.
      	* emultempl/sunos.em: Likewise.
      	* emultempl/xtensaelf.em: Likewise.
  21. 16 Feb, 2018 1 commit
    • Alan Modra's avatar
      Remove bfd stub function casts. · d00dd7dc
      Alan Modra authored
      This patch defines a bunch of new functions to use in the BFD target
      structs rather than casting bfd_false or bfd_true and similar stub
      functions.  I've also renamed the stub functions to reflect their
      parameters and put "error" in the name if they set bfd_error.  The
      latter change is important since there were quite a few uses of
      bfd_false where setting bfd_error was inappropriate, for example in
      elf_backend_allow_non_load_phdr and is_target_special_symbol.
      	* libbfd.c (_bfd_bool_bfd_false_error): Rename from bfd_false.
      	(_bfd_bool_bfd_true): Rename from bfd_true.
      	(_bfd_ptr_bfd_null_error): Rename from bfd_nullvoidptr.
      	(_bfd_int_bfd_0): Rename from bfd_0.
      	(_bfd_uint_bfd_0): Rename from bfd_0u.
      	(_bfd_long_bfd_0): Rename from bfd_0l.
      	(_bfd_long_bfd_n1_error): Rename from _bfd_n1.
      	(_bfd_void_bfd): Rename from bfd_void.
      	(_bfd_bool_bfd_false, _bfd_bool_bfd_asymbol_false),
      	(_bfd_bool_bfd_link_true, _bfd_bool_bfd_bfd_true),
      	(_bfd_bool_bfd_uint_true, _bfd_bool_bfd_ptr_true),
      	(_bfd_void_bfd_link, _bfd_void_bfd_asection): New functions.
      	* archive.c (_bfd_noarchive_get_elt_at_index),
      	(_bfd_noarchive_write_ar_hdr, _bfd_noarchive_truncate_arname),
      	(_bfd_noarchive_write_armap): New functions.
      	* archures.c (_bfd_nowrite_set_arch_mach): New function.
      	* coff-alpha.c (alpha_ecoff_swap_coff_aux_in),
      	(alpha_ecoff_swap_coff_sym_in, alpha_ecoff_swap_coff_lineno_in),
      	(alpha_ecoff_swap_coff_aux_out, alpha_ecoff_swap_coff_sym_out),
      	(alpha_ecoff_swap_coff_reloc_out): New functions.
      	* coff-mips.c (mips_ecoff_swap_coff_aux_in),
      	(mips_ecoff_swap_coff_sym_in, mips_ecoff_swap_coff_lineno_in),
      	(mips_ecoff_swap_coff_aux_out, mips_ecoff_swap_coff_sym_out),
      	(mips_ecoff_swap_coff_reloc_out): New functions.
      	* coffcode.h (coff_set_alignment_hook): Replace define with
      	new function.
      	(symname_in_debug_hook): Likewise.
      	* ecoff.c (_bfd_ecoff_set_alignment_hook): New function.
      	* elfxx-target.h (elf_backend_allow_non_load_phdr): Default to 0.
      	* elf.c (assign_file_positions_except_relocs): Test
      	elf_backend_allow_non_load_phdr for NULL.
      	* elflink.c (_bfd_elf_omit_section_dynsym_default): Rename from
      	_bfd_elf_link_omit_section_dynsym.  Update uses.
      	(_bfd_elf_omit_section_dynsym_all): New function.
      	* elf-bfd.h (_bfd_elf_link_omit_section_dynsym): Delete.
      	(_bfd_elf_omit_section_dynsym_default): Declare.
      	(_bfd_elf_omit_section_dynsym_all): Declare.
      	* linker.c (_bfd_nolink_sizeof_headers, _bfd_nolink_bfd_relax_section),
      	(_bfd_nolink_bfd_is_group_section, _bfd_nolink_bfd_discard_group),
      	(_bfd_nolink_bfd_define_start_stop): New functions.
      	* reloc.c (_bfd_norelocs_bfd_reloc_type_lookup),
      	(_bfd_nodynamic_canonicalize_dynamic_reloc): New functions.
      	* section.c (_bfd_nowrite_set_section_contents): New function.
      	* syms.c (_bfd_nosymbols_canonicalize_symtab),
      	(_bfd_nosymbols_print_symbol, _bfd_nosymbols_get_symbol_info),
      	(_bfd_nosymbols_get_lineno, _bfd_nosymbols_find_nearest_line),
      	(_bfd_nosymbols_find_line, _bfd_nosymbols_find_inliner_info),
      	( _bfd_nosymbols_read_minisymbols),
      	( _bfd_nosymbols_minisymbol_to_symbol),
      	(_bfd_nodynamic_get_synthetic_symtab): New functions.
      	* libbfd-in.h: Declare new functions.  Update existing defines,
      	removing casts.
      	* aix386-core.c: Update to use new hooks.  Formatting.
      	* aout-adobe.c: Likewise.
      	* aout-arm.c: Likewise.
      	* aout-target.h: Likewise.
      	* aout-tic30.c: Likewise.
      	* aoutf1.h: Likewise.
      	* binary.c: Likewise.
      	* bout.c: Likewise.
      	* cisco-core.c: Likewise.
      	* coff-alpha.c: Likewise.
      	* coff-i386.c: Likewise.
      	* coff-i860.c: Likewise.
      	* coff-i960.c: Likewise.
      	* coff-ia64.c: Likewise.
      	* coff-mips.c: Likewise.
      	* coff-ppc.c: Likewise.
      	* coff-rs6000.c: Likewise.
      	* coff-sh.c: Likewise.
      	* coff-tic30.c: Likewise.
      	* coff-tic54x.c: Likewise.
      	* coff-x86_64.c: Likewise.
      	* coff64-rs6000.c: Likewise.
      	* coffcode.h: Likewise.
      	* elf-m10300.c: Likewise.
      	* elf32-cr16.c: Likewise.
      	* elf32-lm32.c: Likewise.
      	* elf32-m32r.c: Likewise.
      	* elf32-metag.c: Likewise.
      	* elf32-score.c: Likewise.
      	* elf32-score7.c: Likewise.
      	* elf32-tilepro.c: Likewise.
      	* elf32-xstormy16.c: Likewise.
      	* elf32-xtensa.c: Likewise.
      	* elf64-alpha.c: Likewise.
      	* elf64-hppa.c: Likewise.
      	* elf64-ia64-vms.c: Likewise.
      	* elf64-mmix.c: Likewise.
      	* elf64-sh64.c: Likewise.
      	* elfnn-ia64.c: Likewise.
      	* elfxx-sparc.c: Likewise.
      	* elfxx-target.h: Likewise.
      	* elfxx-tilegx.c: Likewise.
      	* elfxx-x86.h: Likewise.
      	* hp300hpux.c: Likewise.
      	* hppabsd-core.c: Likewise.
      	* hpux-core.c: Likewise.
      	* i386msdos.c: Likewise.
      	* i386os9k.c: Likewise.
      	* ieee.c: Likewise.
      	* ihex.c: Likewise.
      	* irix-core.c: Likewise.
      	* libaout.h: Likewise.
      	* libecoff.h: Likewise.
      	* mach-o-target.c: Likewise.
      	* mach-o.c: Likewise.
      	* mipsbsd.c: Likewise.
      	* mmo.c: Likewise.
      	* netbsd-core.c: Likewise.
      	* nlm-target.h: Likewise.
      	* oasys.c: Likewise.
      	* osf-core.c: Likewise.
      	* pdp11.c: Likewise.
      	* pe-mips.c: Likewise.
      	* pe-x86_64.c: Likewise.
      	* pef.c: Likewise.
      	* plugin.c: Likewise.
      	* ppcboot.c: Likewise.
      	* ptrace-core.c: Likewise.
      	* sco5-core.c: Likewise.
      	* som.c: Likewise.
      	* sparclynx.c: Likewise.
      	* srec.c: Likewise.
      	* tekhex.c: Likewise.
      	* trad-core.c: Likewise.
      	* verilog.c: Likewise.
      	* versados.c: Likewise.
      	* vms-alpha.c: Likewise.
      	* vms-lib.c: Likewise.
      	* wasm-module.c: Likewise.
      	* xsym.c: Likewise.
      	* libbfd.h: Regenerate.
  22. 24 Jan, 2018 1 commit
    • Renlin Li's avatar
      [GAS][AARCH64]Add group relocations to create PC-relative offset. · 32247401
      Renlin Li authored
      This is a patch to add the gas support for group relocations to create a
      16, 32, 48, or 64 bit PC-relative offset inline.
      The following relocations are added along with the test cases:
      2018-01-24  Renlin Li  <renlin.li@arm.com>
      	* reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0,
      	* bfd-in2.h: Regenerate.
      	* libbfd.h: Regenerate.
      	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for
      2018-01-24  Renlin Li  <renlin.li@arm.com>
      	* config/tc-aarch64.c (reloc_table): add entries for
      	(process_movw_reloc_info): Supports newly added MOVW_PREL relocations.
      	(md_apply_fix): Likewise
      	* testsuite/gas/aarch64/prel_g0.s: New.
      	* testsuite/gas/aarch64/prel_g0.d: New.
      	* testsuite/gas/aarch64/prel_g0_nc.s: New.
      	* testsuite/gas/aarch64/prel_g0_nc.d: New.
      	* testsuite/gas/aarch64/prel_g1.s: New.
      	* testsuite/gas/aarch64/prel_g1.d: New.
      	* testsuite/gas/aarch64/prel_g1_nc.s: New.
      	* testsuite/gas/aarch64/prel_g1_nc.d: New.
      	* testsuite/gas/aarch64/prel_g2.s: New.
      	* testsuite/gas/aarch64/prel_g2.d: New.
      	* testsuite/gas/aarch64/prel_g2_nc.s: New.
      	* testsuite/gas/aarch64/prel_g2_nc.d: New.
      	* testsuite/gas/aarch64/prel_g3.s: New.
      	* testsuite/gas/aarch64/prel_g3.d: New.
  23. 03 Jan, 2018 1 commit
  24. 06 Dec, 2017 1 commit
    • Alan Modra's avatar
      BFD whitespace fixes · 07d6d2b8
      Alan Modra authored
      Binutils is supposed to use tabs.  In my git config I have
      whitespace = indent-with-non-tab,space-before-tab,trailing-space
      and I got annoyed enough seeing red in "git diff" output to fix
      the problems.
      	* doc/header.sed: Trim trailing space when splitting lines.
      	* aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c,
      	* aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h,
      	* arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c,
      	* archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c,
      	* bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c,
      	* coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c,
      	* coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c,
      	* coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c,
      	* coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
      	* coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c,
      	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
      	* coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c,
      	* cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c,
      	* cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c,
      	* cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c,
      	* cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c,
      	* cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c,
      	* cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c,
      	* cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c,
      	* ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c,
      	* elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c,
      	* elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c,
      	* elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h,
      	* elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c,
      	* elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c,
      	* elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c,
      	* elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c,
      	* elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c,
      	* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c,
      	* elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c,
      	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c,
      	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
      	* elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c,
      	* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
      	* elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h,
      	* elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c,
      	* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c,
      	* elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c,
      	* elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c,
      	* elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
      	* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
      	* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
      	* elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h,
      	* elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
      	* elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c,
      	* elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c,
      	* elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c,
      	* host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c,
      	* i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c,
      	* i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h,
      	* libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h,
      	* libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c,
      	* m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c,
      	* mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c,
      	* mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h,
      	* netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c,
      	* nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c,
      	* opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c,
      	* pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c,
      	* pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c,
      	* peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c,
      	* riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h,
      	* sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c,
      	* syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c,
      	* vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c,
      	* vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c,
      	* xsym.c, * xsym.h: Whitespace fixes.
      	* bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
  25. 28 Nov, 2017 1 commit
    • Nick Clifton's avatar
      Fix a memory access violation when attempting to parse a corrupt COFF binary... · b23dc97f
      Nick Clifton authored
      Fix a memory access violation when attempting to parse a corrupt COFF binary with a relocation that points beyond the end of the section to be relocated.
      	PR 22506
      	* reloc.c (reloc_offset_in_range): Rename to
      	bfd_reloc_offset_in_range and export.
      	(bfd_perform_relocation): Rename function invocation.
      	(bfd_install_relocation): Likewise.
      	(bfd_final_link_relocate): Likewise.
      	* bfd-in2.h: Regenerate.
      	* coff-arm.c (coff_arm_reloc): Use bfd_reloc_offset_in_range.
      	* coff-i386.c (coff_i386_reloc): Likewise.
      	* coff-i860.c (coff_i860_reloc): Likewise.
      	* coff-m68k.c (mk68kcoff_common_addend_special_fn): Likewise.
      	* coff-m88k.c (m88k_special_reloc): Likewise.
      	* coff-mips.c (mips_reflo_reloc): Likewise.
      	* coff-x86_64.c (coff_amd64_reloc): Likewise.
  26. 01 Nov, 2017 1 commit
    • James Bowman's avatar
      FT32B is a new FT32 family member. It has a code compression scheme, which... · 81b42bca
      James Bowman authored
      FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts.
      Part 2 adds a relaxation pass, which actually implements the code compression scheme.
      bfd	* archures.c: Add bfd_mach_ft32b.
      	* cpu-ft32.c: Add arch_info_struct.
      	* elf32-ft32.c: Add R_FT32_RELAX, SC0, SC1,
      	DIFF32. (ft32_elf_relocate_section): Add clauses
      	for R_FT32_SC0, SC1, DIFF32.  (ft32_reloc_shortable,
      	elf32_ft32_is_diff_reloc, elf32_ft32_adjust_diff_reloc_value,
      	elf32_ft32_relax_delete_bytes, elf32_ft32_relax_is_branch_target,
      	ft32_elf_relax_section): New function.
      	* reloc.c: Add BFD_RELOC_FT32_RELAX, SC0, SC1, DIFF32.
      	* bfd-in2.h: Regenerate.
      	* libbfd.h: Regenerate.
      gas	* config/tc-ft32.c (md_assemble): add relaxation reloc
      	BFD_RELOC_FT32_RELAX.  (md_longopts): Add "norelax" and
      	"no-relax". (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
      	(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
      	ft32_allow_local_subtract): New function.
      	* config/tc-ft32.h: remove unused MD_PCREL_FROM_SECTION.
      	* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
      include	* elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
  27. 13 Oct, 2017 1 commit
    • James Bowman's avatar
      FT32: support for FT32B processor - part 1 · 3b4b0a62
      James Bowman authored
      FT32B is a new FT32 family member. It has a code
      compression scheme, which requires the use of linker
      relaxations. The change is quite large, so submission
      is in several parts.
      Part 1 adds a 15-bit instruction field, and CPU-specific functions for
      the code compression that are used in binutils and GDB.
      2017-10-12  James Bowman  <james.bowman@ftdichip.com>
      	* bfd-in2.h: Regenerate.
      	* libbfd.h: Regenerate.
      	* elf32-ft32.c: Add HOWTO R_FT32_15.
      	* reloc.c: Add BFD_RELOC_FT32_15.
      2017-10-12  James Bowman  <james.bowman@ftdichip.com>
      	* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
      	(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.
      2017-10-12  James Bowman  <james.bowman@ftdichip.com>
      	* elf/ft32.h: Add R_FT32_15.
      	* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
      	(ft32_shortcode, sc_compar, ft32_split_shortcode,
      	ft32_merge_shortcode, ft32_merge_shortcode): New functions.
      2017-10-12  James Bowman  <james.bowman@ftdichip.com>
      	* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
      	* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
      	K15. Add jmpix pattern.
      2017-10-12  James Bowman  <james.bowman@ftdichip.com>
      	* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
  28. 12 Oct, 2017 1 commit
    • Nick Clifton's avatar
      Force the AArch64 linker backend to refuse to link when it encounters unresoleable relocations. · 1d75a8e2
      Nick Clifton authored
      	* reloc.c (enum bfd_reloc_status): Start values at 2.
      	* bfd-in2.h: Regenerate.
      	* elfnn-aarch64.c (aarch64_relocate): Invert sense of function, so
      	that a TRUE return indicates success.  Compare the result of
      	calling _bfd_aarch64_elf_put_addend against bfd_reloc_ok.
      	(build_one_stub): Change sense of tests against aarch64_relocate
      	return value.
      	(elfNN_aarch64_tls_relax): Return bfd_reloc_notsupported, rather
      	than FALSE, when an error is detected.
      	(elfNN_aarch64_final_link_relocate): Likewise.
      	* testsuite/ld-aarch64/pcrel_pic_defined.d: Expect errors not
      	warnings.  Expect errors about unsupported relocations.
      	* testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise.
  29. 24 Jul, 2017 1 commit
    • Nick Clifton's avatar
      Improve "unrecognized relocation" error messages to add the suggestion that... · 47aeb64c
      Nick Clifton authored
      Improve "unrecognized relocation" error messages to add the suggestion that the linker might be out of date.
      	PR 21803
      	* reloc.c (_bfd_unrecognized_reloc): New function.  Reports
      	an unrecognized reloc and sets the bfd_error value.
      	* libbfd.h: Regenerate.
      	* elf32-arm.c (elf32_arm_final_link_relocate): Use the new
      	* elf32-i386.c (elf_i386_relocate_section): Likewise.
      	* elf32-tilepro.c (tilepro_elf_relocate_section): Likewise.
      	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
      	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise.
      	* elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise.
  30. 19 Jul, 2017 1 commit
    • John Eric Martin's avatar
      [ARC] Add JLI support. · 684d5a10
      John Eric Martin authored
      The following relocation types were added to GCC/binutils:
      ARC_JLI_SECTOFF is a relocation type in Metaware that is now used by
      GCC as well to adjust the index of function calls to functions with
      attribute jli_call_always.
      2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
      	    John Eric Martin  <John.Martin@emmicro-us.com>
      	* bfd-in2.h: Regenerate.
      	* libbfd.h: Regenerate.
      	* elf32-arc.c (JLI): Define.
      	* reloc.c: Add JLI relocations.
      2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
      	* testsuite/gas/arc/jli-1.d: New file.
      	* testsuite/gas/arc/jli-1.s: Likewise.
      	* testsuite/gas/arc/taux.d: Update for jli_base.
      2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
      	    John Eric Martin  <John.Martin@emmicro-us.com>
      	* elf/arc-reloc.def: Add JLI relocs howto.
      	* opcode/arc-func.h (replace_jli): New function.
      2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
      	    John Eric Martin  <John.Martin@emmicro-us.com>
      	* emulparams/arcelf.sh (JLI_START_TABLE): Define.
      	* scripttempl/elfarc.sc: Handle jlitab section.
      	* scripttempl/elfarcv2.sc: Likewise.
      	* testsuite/ld-arc/arc.exp: Add JLI test.
      	* testsuite/ld-arc/jli-script.ld: New file.
      	* testsuite/ld-arc/jli-simple.dd: Likewise.
      	* testsuite/ld-arc/jli-simple.rd: Likewise.
      	* testsuite/ld-arc/jli-simple.s: Likewise.
      	* testsuite/ld/testsuite/ld-arc/jli-overflow.s: Likewise.
      	* testsuite/ld/testsuite/ld-arc/jli-overflow.d: Likewise.
      	* testsuite/ld/testsuite/ld-arc/jli-overflow.err: Likewise.
      2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
      	    John Eric Martin  <John.Martin@emmicro-us.com>
      	* arc-opc.c (UIMM10_6_S_JLIOFF): Define.
      	(UIMM3_23): Adjust accordingly.
      	* arc-regs.h: Add/correct jli_base register.
      	* arc-tbl.h (jli_s): Likewise.
  31. 27 Jun, 2017 1 commit
    • Kuan-Lin Chen's avatar
      RISC-V: Use pc-relative relocation for FDE initial location · a6cbf936
      Kuan-Lin Chen authored
      The symbol address in .eh_frame may be adjusted in
      _bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be
      adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert
      a relocation whose addend symbol is in .eh_frame. Othrewise, the value
      may be adjusted twice.
      2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>
      	* elfnn-riscv.c (perform_relocation): Support the new
      	R_RISCV_32_PCREL relocation.
      	(riscv_elf_relocate_section): Likewise.
      	* elfxx-riscv.c (howto_table): Likewise.
      	(riscv_reloc_map): Likewise.
      	* bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation.
      	* libbfd.h: Regenerate.
      2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>
      	* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
      	R_RISCV_32_PCREL relocation.
      2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>
      	* elf/riscv.h (R_RISCV_32_PCREL): New.
  32. 23 Jun, 2017 1 commit
  33. 21 Jun, 2017 1 commit
  34. 10 May, 2017 1 commit
    • Jose E. Marchesi's avatar
      bfd: new BFD target entry point _bfd_set_reloc. · 23186865
      Jose E. Marchesi authored
      This patch adds a new entry point to the BFD_JUMP_TABLE_RELOCS.  The
      previous common implementation `bfd_set_reloc', in bfd/bfd.c, has been
      moved to bfd/reloc.c with the name `_bfd_generic_set_reloc', and all
      BFD targets has been adapted to use it.
      This patch doesn't introduce any change on functionality, but prepares
      the ground for further work.
          2017-05-10  Jose E. Marchesi  <jose.marchesi@oracle.com>
          	* targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc.
          	(struct bfd_target): New field _bfd_set_reloc.
          	* bfd.c (bfd_set_reloc): Call backend _set_bfd.
          	* reloc.c (_bfd_generic_set_reloc): New function.
          	* coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc.
          	* nlm-target.h (nlm_set_reloc): Likewise.
          	* coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise.
          	* aout-tic30.c (MY_set_reloc): Likewise.
          	* aout-target.h (MY_set_reloc): Likewise.
          	* elfxx-target.h (bfd_elfNN_set_reloc): Likewise.
          	* coff-alpha.c (_bfd_ecoff_set_reloc): Likewise.
          	* mach-o-target.c (bfd_mach_o_set_reloc): Likewise.
          	* vms-alpha.c (alpha_vms_set_reloc): Likewise.
          	* aout-adobe.c (aout_32_set_reloc): Likewise.
          	* bout.c (b_out_set_reloc): Likewise.
          	* coff-mips.c (_bfd_ecoff_set_reloc): Likewise.
          	* i386os9k.c (aout_32_set_reloc): Likewise.
          	* ieee.c (ieee_set_reloc): Likewise.
          	* oasys.c (oasys_set_reloc): Likewise.
          	* som.c (som_set_reloc): Likewise.
          	* versados.c (versados_set_reloc): Likewise.
          	* coff64-rs6000.c (rs6000_xcoff64_vec): Add
          	(rs6000_xcoff64_aix_vec): LIkewise.
          	* libbfd.c (_bfd_norelocs_set_reloc): New function.
          	* libbfd-in.h: Prototype for _bfd_norelocs_set_reloc.
          	* i386msdos.c (msdos_set_reloc): Define to
          	* elfcode.h (elf_set_reloc): Define.
          	* bfd-in2.h: Regenerated.