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Commit 6eadf107 authored by Ingo Molnar's avatar Ingo Molnar
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Merge branch 'tip/perf/urgent-2' of...

Merge branch 'tip/perf/urgent-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace into perf/urgent
parents a1c61174 c10076c4
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with 142 additions and 122 deletions
...@@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows: ...@@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows:
eax, ebx, ecx, edx: the values returned by the cpuid instruction for eax, ebx, ecx, edx: the values returned by the cpuid instruction for
this function/index combination this function/index combination
The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned
as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC
support. Instead it is reported via
ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER)
if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the
feature in userspace, then you can enable the feature for KVM_SET_CPUID2.
4.47 KVM_PPC_GET_PVINFO 4.47 KVM_PPC_GET_PVINFO
Capability: KVM_CAP_PPC_GET_PVINFO Capability: KVM_CAP_PPC_GET_PVINFO
...@@ -1151,6 +1160,13 @@ following flags are specified: ...@@ -1151,6 +1160,13 @@ following flags are specified:
/* Depends on KVM_CAP_IOMMU */ /* Depends on KVM_CAP_IOMMU */
#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
The KVM_DEV_ASSIGN_ENABLE_IOMMU flag is a mandatory option to ensure
isolation of the device. Usages not specifying this flag are deprecated.
Only PCI header type 0 devices with PCI BAR resources are supported by
device assignment. The user requesting this ioctl must have read/write
access to the PCI sysfs resource files associated with the device.
4.49 KVM_DEASSIGN_PCI_DEVICE 4.49 KVM_DEASSIGN_PCI_DEVICE
Capability: KVM_CAP_DEVICE_DEASSIGNMENT Capability: KVM_CAP_DEVICE_DEASSIGNMENT
......
...@@ -1698,11 +1698,9 @@ F: arch/x86/include/asm/tce.h ...@@ -1698,11 +1698,9 @@ F: arch/x86/include/asm/tce.h
CAN NETWORK LAYER CAN NETWORK LAYER
M: Oliver Hartkopp <socketcan@hartkopp.net> M: Oliver Hartkopp <socketcan@hartkopp.net>
M: Oliver Hartkopp <oliver.hartkopp@volkswagen.de>
M: Urs Thuermann <urs.thuermann@volkswagen.de>
L: linux-can@vger.kernel.org L: linux-can@vger.kernel.org
L: netdev@vger.kernel.org W: http://gitorious.org/linux-can
W: http://developer.berlios.de/projects/socketcan/ T: git git://gitorious.org/linux-can/linux-can-next.git
S: Maintained S: Maintained
F: net/can/ F: net/can/
F: include/linux/can.h F: include/linux/can.h
...@@ -1713,9 +1711,10 @@ F: include/linux/can/gw.h ...@@ -1713,9 +1711,10 @@ F: include/linux/can/gw.h
CAN NETWORK DRIVERS CAN NETWORK DRIVERS
M: Wolfgang Grandegger <wg@grandegger.com> M: Wolfgang Grandegger <wg@grandegger.com>
M: Marc Kleine-Budde <mkl@pengutronix.de>
L: linux-can@vger.kernel.org L: linux-can@vger.kernel.org
L: netdev@vger.kernel.org W: http://gitorious.org/linux-can
W: http://developer.berlios.de/projects/socketcan/ T: git git://gitorious.org/linux-can/linux-can-next.git
S: Maintained S: Maintained
F: drivers/net/can/ F: drivers/net/can/
F: include/linux/can/dev.h F: include/linux/can/dev.h
...@@ -2700,7 +2699,7 @@ FIREWIRE SUBSYSTEM ...@@ -2700,7 +2699,7 @@ FIREWIRE SUBSYSTEM
M: Stefan Richter <stefanr@s5r6.in-berlin.de> M: Stefan Richter <stefanr@s5r6.in-berlin.de>
L: linux1394-devel@lists.sourceforge.net L: linux1394-devel@lists.sourceforge.net
W: http://ieee1394.wiki.kernel.org/ W: http://ieee1394.wiki.kernel.org/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394.git
S: Maintained S: Maintained
F: drivers/firewire/ F: drivers/firewire/
F: include/linux/firewire*.h F: include/linux/firewire*.h
......
VERSION = 3 VERSION = 3
PATCHLEVEL = 2 PATCHLEVEL = 2
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc6 EXTRAVERSION =
NAME = Saber-toothed Squirrel NAME = Saber-toothed Squirrel
# *DOCUMENTATION* # *DOCUMENTATION*
......
...@@ -1246,7 +1246,7 @@ config PL310_ERRATA_588369 ...@@ -1246,7 +1246,7 @@ config PL310_ERRATA_588369
config ARM_ERRATA_720789 config ARM_ERRATA_720789
bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
depends on CPU_V7 && SMP depends on CPU_V7
help help
This option enables the workaround for the 720789 Cortex-A9 (prior to This option enables the workaround for the 720789 Cortex-A9 (prior to
r2p0) erratum. A faulty ASID can be sent to the other CPUs for the r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
...@@ -1282,7 +1282,7 @@ config ARM_ERRATA_743622 ...@@ -1282,7 +1282,7 @@ config ARM_ERRATA_743622
config ARM_ERRATA_751472 config ARM_ERRATA_751472
bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
depends on CPU_V7 && SMP depends on CPU_V7
help help
This option enables the workaround for the 751472 Cortex-A9 (prior This option enables the workaround for the 751472 Cortex-A9 (prior
to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
......
...@@ -221,17 +221,6 @@ ...@@ -221,17 +221,6 @@
*/ */
#define MCODE_BUFF_PER_REQ 256 #define MCODE_BUFF_PER_REQ 256
/*
* Mark a _pl330_req as free.
* We do it by writing DMAEND as the first instruction
* because no valid request is going to have DMAEND as
* its first instruction to execute.
*/
#define MARK_FREE(req) do { \
_emit_END(0, (req)->mc_cpu); \
(req)->mc_len = 0; \
} while (0)
/* If the _pl330_req is available to the client */ /* If the _pl330_req is available to the client */
#define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND) #define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
...@@ -301,8 +290,10 @@ struct pl330_thread { ...@@ -301,8 +290,10 @@ struct pl330_thread {
struct pl330_dmac *dmac; struct pl330_dmac *dmac;
/* Only two at a time */ /* Only two at a time */
struct _pl330_req req[2]; struct _pl330_req req[2];
/* Index of the last submitted request */ /* Index of the last enqueued request */
unsigned lstenq; unsigned lstenq;
/* Index of the last submitted request or -1 if the DMA is stopped */
int req_running;
}; };
enum pl330_dmac_state { enum pl330_dmac_state {
...@@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, ...@@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
writel(0, regs + DBGCMD); writel(0, regs + DBGCMD);
} }
/*
* Mark a _pl330_req as free.
* We do it by writing DMAEND as the first instruction
* because no valid request is going to have DMAEND as
* its first instruction to execute.
*/
static void mark_free(struct pl330_thread *thrd, int idx)
{
struct _pl330_req *req = &thrd->req[idx];
_emit_END(0, req->mc_cpu);
req->mc_len = 0;
thrd->req_running = -1;
}
static inline u32 _state(struct pl330_thread *thrd) static inline u32 _state(struct pl330_thread *thrd)
{ {
void __iomem *regs = thrd->dmac->pinfo->base; void __iomem *regs = thrd->dmac->pinfo->base;
...@@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd) ...@@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd)
} }
} }
/* If the request 'req' of thread 'thrd' is currently active */
static inline bool _req_active(struct pl330_thread *thrd,
struct _pl330_req *req)
{
void __iomem *regs = thrd->dmac->pinfo->base;
u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id));
if (IS_FREE(req))
return false;
return (pc >= buf && pc <= buf + req->mc_len) ? true : false;
}
/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */
static inline unsigned _thrd_active(struct pl330_thread *thrd)
{
if (_req_active(thrd, &thrd->req[0]))
return 1; /* First req active */
if (_req_active(thrd, &thrd->req[1]))
return 2; /* Second req active */
return 0;
}
static void _stop(struct pl330_thread *thrd) static void _stop(struct pl330_thread *thrd)
{ {
void __iomem *regs = thrd->dmac->pinfo->base; void __iomem *regs = thrd->dmac->pinfo->base;
...@@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd) ...@@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd)
struct _arg_GO go; struct _arg_GO go;
unsigned ns; unsigned ns;
u8 insn[6] = {0, 0, 0, 0, 0, 0}; u8 insn[6] = {0, 0, 0, 0, 0, 0};
int idx;
/* Return if already ACTIVE */ /* Return if already ACTIVE */
if (_state(thrd) != PL330_STATE_STOPPED) if (_state(thrd) != PL330_STATE_STOPPED)
return true; return true;
if (!IS_FREE(&thrd->req[1 - thrd->lstenq])) idx = 1 - thrd->lstenq;
req = &thrd->req[1 - thrd->lstenq]; if (!IS_FREE(&thrd->req[idx]))
else if (!IS_FREE(&thrd->req[thrd->lstenq])) req = &thrd->req[idx];
req = &thrd->req[thrd->lstenq]; else {
idx = thrd->lstenq;
if (!IS_FREE(&thrd->req[idx]))
req = &thrd->req[idx];
else else
req = NULL; req = NULL;
}
/* Return if no request */ /* Return if no request */
if (!req || !req->r) if (!req || !req->r)
...@@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd) ...@@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd)
/* Only manager can execute GO */ /* Only manager can execute GO */
_execute_DBGINSN(thrd, insn, true); _execute_DBGINSN(thrd, insn, true);
thrd->req_running = idx;
return true; return true;
} }
...@@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data) ...@@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data)
thrd->req[0].r = NULL; thrd->req[0].r = NULL;
thrd->req[1].r = NULL; thrd->req[1].r = NULL;
MARK_FREE(&thrd->req[0]); mark_free(thrd, 0);
MARK_FREE(&thrd->req[1]); mark_free(thrd, 1);
/* Clear the reset flag */ /* Clear the reset flag */
pl330->dmac_tbd.reset_chan &= ~(1 << i); pl330->dmac_tbd.reset_chan &= ~(1 << i);
...@@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi) ...@@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi)
thrd = &pl330->channels[id]; thrd = &pl330->channels[id];
active = _thrd_active(thrd); active = thrd->req_running;
if (!active) /* Aborted */ if (active == -1) /* Aborted */
continue; continue;
active -= 1;
rqdone = &thrd->req[active]; rqdone = &thrd->req[active];
MARK_FREE(rqdone); mark_free(thrd, active);
/* Get going again ASAP */ /* Get going again ASAP */
_start(thrd); _start(thrd);
...@@ -1509,7 +1496,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) ...@@ -1509,7 +1496,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
struct pl330_thread *thrd = ch_id; struct pl330_thread *thrd = ch_id;
struct pl330_dmac *pl330; struct pl330_dmac *pl330;
unsigned long flags; unsigned long flags;
int ret = 0, active; int ret = 0, active = thrd->req_running;
if (!thrd || thrd->free || thrd->dmac->state == DYING) if (!thrd || thrd->free || thrd->dmac->state == DYING)
return -EINVAL; return -EINVAL;
...@@ -1525,28 +1512,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) ...@@ -1525,28 +1512,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
thrd->req[0].r = NULL; thrd->req[0].r = NULL;
thrd->req[1].r = NULL; thrd->req[1].r = NULL;
MARK_FREE(&thrd->req[0]); mark_free(thrd, 0);
MARK_FREE(&thrd->req[1]); mark_free(thrd, 1);
break; break;
case PL330_OP_ABORT: case PL330_OP_ABORT:
active = _thrd_active(thrd);
/* Make sure the channel is stopped */ /* Make sure the channel is stopped */
_stop(thrd); _stop(thrd);
/* ABORT is only for the active req */ /* ABORT is only for the active req */
if (!active) if (active == -1)
break; break;
active--;
thrd->req[active].r = NULL; thrd->req[active].r = NULL;
MARK_FREE(&thrd->req[active]); mark_free(thrd, active);
/* Start the next */ /* Start the next */
case PL330_OP_START: case PL330_OP_START:
if (!_thrd_active(thrd) && !_start(thrd)) if ((active == -1) && !_start(thrd))
ret = -EIO; ret = -EIO;
break; break;
...@@ -1587,14 +1570,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus) ...@@ -1587,14 +1570,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
else else
pstatus->faulting = false; pstatus->faulting = false;
active = _thrd_active(thrd); active = thrd->req_running;
if (!active) { if (active == -1) {
/* Indicate that the thread is not running */ /* Indicate that the thread is not running */
pstatus->top_req = NULL; pstatus->top_req = NULL;
pstatus->wait_req = NULL; pstatus->wait_req = NULL;
} else { } else {
active--;
pstatus->top_req = thrd->req[active].r; pstatus->top_req = thrd->req[active].r;
pstatus->wait_req = !IS_FREE(&thrd->req[1 - active]) pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
? thrd->req[1 - active].r : NULL; ? thrd->req[1 - active].r : NULL;
...@@ -1659,9 +1641,9 @@ void *pl330_request_channel(const struct pl330_info *pi) ...@@ -1659,9 +1641,9 @@ void *pl330_request_channel(const struct pl330_info *pi)
thrd->free = false; thrd->free = false;
thrd->lstenq = 1; thrd->lstenq = 1;
thrd->req[0].r = NULL; thrd->req[0].r = NULL;
MARK_FREE(&thrd->req[0]); mark_free(thrd, 0);
thrd->req[1].r = NULL; thrd->req[1].r = NULL;
MARK_FREE(&thrd->req[1]); mark_free(thrd, 1);
break; break;
} }
} }
...@@ -1767,14 +1749,14 @@ static inline void _reset_thread(struct pl330_thread *thrd) ...@@ -1767,14 +1749,14 @@ static inline void _reset_thread(struct pl330_thread *thrd)
thrd->req[0].mc_bus = pl330->mcode_bus thrd->req[0].mc_bus = pl330->mcode_bus
+ (thrd->id * pi->mcbufsz); + (thrd->id * pi->mcbufsz);
thrd->req[0].r = NULL; thrd->req[0].r = NULL;
MARK_FREE(&thrd->req[0]); mark_free(thrd, 0);
thrd->req[1].mc_cpu = thrd->req[0].mc_cpu thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
+ pi->mcbufsz / 2; + pi->mcbufsz / 2;
thrd->req[1].mc_bus = thrd->req[0].mc_bus thrd->req[1].mc_bus = thrd->req[0].mc_bus
+ pi->mcbufsz / 2; + pi->mcbufsz / 2;
thrd->req[1].r = NULL; thrd->req[1].r = NULL;
MARK_FREE(&thrd->req[1]); mark_free(thrd, 1);
} }
static int dmac_alloc_threads(struct pl330_dmac *pl330) static int dmac_alloc_threads(struct pl330_dmac *pl330)
......
...@@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y ...@@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y
CONFIG_ARCH_IMX_V4_V5=y CONFIG_ARCH_IMX_V4_V5=y
CONFIG_ARCH_MX1ADS=y CONFIG_ARCH_MX1ADS=y
CONFIG_MACH_SCB9328=y CONFIG_MACH_SCB9328=y
CONFIG_MACH_APF9328=y
CONFIG_MACH_MX21ADS=y CONFIG_MACH_MX21ADS=y
CONFIG_MACH_MX25_3DS=y CONFIG_MACH_MX25_3DS=y
CONFIG_MACH_EUKREA_CPUIMX25=y CONFIG_MACH_EUKREA_CPUIMX25SD=y
CONFIG_MACH_MX27ADS=y CONFIG_MACH_MX27ADS=y
CONFIG_MACH_PCM038=y CONFIG_MACH_PCM038=y
CONFIG_MACH_CPUIMX27=y CONFIG_MACH_CPUIMX27=y
...@@ -72,17 +73,16 @@ CONFIG_MTD_CFI_GEOMETRY=y ...@@ -72,17 +73,16 @@ CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_NAND=y CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y CONFIG_MTD_UBI=y
CONFIG_MISC_DEVICES=y CONFIG_MISC_DEVICES=y
CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y CONFIG_EEPROM_AT25=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMC91X=y
CONFIG_DM9000=y CONFIG_DM9000=y
CONFIG_SMC91X=y
CONFIG_SMC911X=y CONFIG_SMC911X=y
# CONFIG_NETDEV_1000 is not set CONFIG_SMSC_PHY=y
# CONFIG_NETDEV_10000 is not set
# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_KEYBOARD is not set
...@@ -100,6 +100,7 @@ CONFIG_I2C_CHARDEV=y ...@@ -100,6 +100,7 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y CONFIG_I2C_IMX=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_SPI_IMX=y CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=y
CONFIG_W1=y CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y CONFIG_W1_SLAVE_THERM=y
...@@ -139,6 +140,7 @@ CONFIG_MMC=y ...@@ -139,6 +140,7 @@ CONFIG_MMC=y
CONFIG_MMC_MXC=y CONFIG_MMC_MXC=y
CONFIG_NEW_LEDS=y CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_MC13783=y CONFIG_LEDS_MC13783=y
CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_TIMER=y
......
...@@ -110,11 +110,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { ...@@ -110,11 +110,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
.length = SZ_4K, .length = SZ_4K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_SROMC,
.pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
.length = SZ_4K,
.type = MT_DEVICE,
}, { }, {
.virtual = (unsigned long)S3C_VA_USB_HSPHY, .virtual = (unsigned long)S3C_VA_USB_HSPHY,
.pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
......
...@@ -132,7 +132,7 @@ config MACH_MX25_3DS ...@@ -132,7 +132,7 @@ config MACH_MX25_3DS
select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
config MACH_EUKREA_CPUIMX25 config MACH_EUKREA_CPUIMX25SD
bool "Support Eukrea CPUIMX25 Platform" bool "Support Eukrea CPUIMX25 Platform"
select SOC_IMX25 select SOC_IMX25
select IMX_HAVE_PLATFORM_FLEXCAN select IMX_HAVE_PLATFORM_FLEXCAN
...@@ -148,7 +148,7 @@ config MACH_EUKREA_CPUIMX25 ...@@ -148,7 +148,7 @@ config MACH_EUKREA_CPUIMX25
choice choice
prompt "Baseboard" prompt "Baseboard"
depends on MACH_EUKREA_CPUIMX25 depends on MACH_EUKREA_CPUIMX25SD
default MACH_EUKREA_MBIMXSD25_BASEBOARD default MACH_EUKREA_MBIMXSD25_BASEBOARD
config MACH_EUKREA_MBIMXSD25_BASEBOARD config MACH_EUKREA_MBIMXSD25_BASEBOARD
...@@ -542,7 +542,7 @@ config MACH_MX35_3DS ...@@ -542,7 +542,7 @@ config MACH_MX35_3DS
Include support for MX35PDK platform. This includes specific Include support for MX35PDK platform. This includes specific
configurations for the board and its peripherals. configurations for the board and its peripherals.
config MACH_EUKREA_CPUIMX35 config MACH_EUKREA_CPUIMX35SD
bool "Support Eukrea CPUIMX35 Platform" bool "Support Eukrea CPUIMX35 Platform"
select SOC_IMX35 select SOC_IMX35
select IMX_HAVE_PLATFORM_FLEXCAN select IMX_HAVE_PLATFORM_FLEXCAN
...@@ -560,7 +560,7 @@ config MACH_EUKREA_CPUIMX35 ...@@ -560,7 +560,7 @@ config MACH_EUKREA_CPUIMX35
choice choice
prompt "Baseboard" prompt "Baseboard"
depends on MACH_EUKREA_CPUIMX35 depends on MACH_EUKREA_CPUIMX35SD
default MACH_EUKREA_MBIMXSD35_BASEBOARD default MACH_EUKREA_MBIMXSD35_BASEBOARD
config MACH_EUKREA_MBIMXSD35_BASEBOARD config MACH_EUKREA_MBIMXSD35_BASEBOARD
......
...@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o ...@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
# i.MX25 based machines # i.MX25 based machines
obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
# i.MX27 based machines # i.MX27 based machines
...@@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o ...@@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o
# i.MX35 based machines # i.MX35 based machines
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
......
...@@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = { ...@@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = {
int __init mx35_clocks_init() int __init mx35_clocks_init()
{ {
unsigned int cgr2 = 3 << 26, cgr3 = 0; unsigned int cgr2 = 3 << 26;
#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
cgr2 |= 3 << 16; cgr2 |= 3 << 16;
...@@ -521,6 +521,12 @@ int __init mx35_clocks_init() ...@@ -521,6 +521,12 @@ int __init mx35_clocks_init()
__raw_writel((3 << 18), CCM_BASE + CCM_CGR0); __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
__raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
CCM_BASE + CCM_CGR1); CCM_BASE + CCM_CGR1);
__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
__raw_writel(0, CCM_BASE + CCM_CGR3);
clk_enable(&iim_clk);
imx_print_silicon_rev("i.MX35", mx35_revision());
clk_disable(&iim_clk);
/* /*
* Check if we came up in internal boot mode. If yes, we need some * Check if we came up in internal boot mode. If yes, we need some
...@@ -529,16 +535,10 @@ int __init mx35_clocks_init() ...@@ -529,16 +535,10 @@ int __init mx35_clocks_init()
*/ */
if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
/* Additionally turn on UART1, SCC, and IIM clocks */ /* Additionally turn on UART1, SCC, and IIM clocks */
cgr2 |= 3 << 16 | 3 << 4;
cgr3 |= 3 << 2;
}
__raw_writel(cgr2, CCM_BASE + CCM_CGR2);
__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
clk_enable(&iim_clk); clk_enable(&iim_clk);
imx_print_silicon_rev("i.MX35", mx35_revision()); clk_enable(&uart1_clk);
clk_disable(&iim_clk); clk_enable(&scc_clk);
}
#ifdef CONFIG_MXC_USE_EPIT #ifdef CONFIG_MXC_USE_EPIT
epit_timer_init(&epit1_clk, epit_timer_init(&epit1_clk,
......
...@@ -53,12 +53,18 @@ static const struct imxi2c_platform_data ...@@ -53,12 +53,18 @@ static const struct imxi2c_platform_data
.bitrate = 100000, .bitrate = 100000,
}; };
#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2)
static int tsc2007_get_pendown_state(void)
{
return !gpio_get_value(TSC2007_IRQGPIO);
}
static struct tsc2007_platform_data tsc2007_info = { static struct tsc2007_platform_data tsc2007_info = {
.model = 2007, .model = 2007,
.x_plate_ohms = 180, .x_plate_ohms = 180,
.get_pendown_state = tsc2007_get_pendown_state,
}; };
#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2)
static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
{ {
I2C_BOARD_INFO("pcf8563", 0x51), I2C_BOARD_INFO("pcf8563", 0x51),
......
...@@ -3247,18 +3247,14 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { ...@@ -3247,18 +3247,14 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
/* 3430ES1-only hwmods */ /* 3430ES1-only hwmods */
static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
&omap3xxx_iva_hwmod,
&omap3430es1_dss_core_hwmod, &omap3430es1_dss_core_hwmod,
&omap3xxx_mailbox_hwmod,
NULL NULL
}; };
/* 3430ES2+-only hwmods */ /* 3430ES2+-only hwmods */
static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
&omap3xxx_iva_hwmod,
&omap3xxx_dss_core_hwmod, &omap3xxx_dss_core_hwmod,
&omap3xxx_usbhsotg_hwmod, &omap3xxx_usbhsotg_hwmod,
&omap3xxx_mailbox_hwmod,
NULL NULL
}; };
......
...@@ -363,11 +363,13 @@ __v7_setup: ...@@ -363,11 +363,13 @@ __v7_setup:
orreq r10, r10, #1 << 6 @ set bit #6 orreq r10, r10, #1 << 6 @ set bit #6
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
#endif #endif
#ifdef CONFIG_ARM_ERRATA_751472 #if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP)
cmp r6, #0x30 @ present prior to r3p0 ALT_SMP(cmp r6, #0x30) @ present prior to r3p0
ALT_UP_B(1f)
mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register
orrlt r10, r10, #1 << 11 @ set bit #11 orrlt r10, r10, #1 << 11 @ set bit #11
mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register
1:
#endif #endif
3: mov r10, #0 3: mov r10, #0
......
...@@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy, ...@@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy,
return ret; return ret;
} }
static int __init mxc_cpufreq_init(struct cpufreq_policy *policy) static int mxc_cpufreq_init(struct cpufreq_policy *policy)
{ {
int ret; int ret;
int i; int i;
......
...@@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) ...@@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
case MACH_TYPE_PCM043: case MACH_TYPE_PCM043:
case MACH_TYPE_LILLY1131: case MACH_TYPE_LILLY1131:
case MACH_TYPE_VPR200: case MACH_TYPE_VPR200:
case MACH_TYPE_EUKREA_CPUIMX35SD:
uart_base = MX3X_UART1_BASE_ADDR; uart_base = MX3X_UART1_BASE_ADDR;
break; break;
case MACH_TYPE_MAGX_ZN5: case MACH_TYPE_MAGX_ZN5:
......
...@@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) ...@@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
do_div(c, period_ns); do_div(c, period_ns);
duty_cycles = c; duty_cycles = c;
/*
* according to imx pwm RM, the real period value should be
* PERIOD value in PWMPR plus 2.
*/
if (period_cycles > 2)
period_cycles -= 2;
else
period_cycles = 0;
writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
writel(period_cycles, pwm->mmio_base + MX3_PWMPR); writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
......
...@@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio, ...@@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
struct orion_gpio_chip *ochip; struct orion_gpio_chip *ochip;
struct irq_chip_generic *gc; struct irq_chip_generic *gc;
struct irq_chip_type *ct; struct irq_chip_type *ct;
char gc_label[16];
if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips)) if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
return; return;
snprintf(gc_label, sizeof(gc_label), "orion_gpio%d",
orion_gpio_chip_count);
ochip = orion_gpio_chips + orion_gpio_chip_count; ochip = orion_gpio_chips + orion_gpio_chip_count;
ochip->chip.label = "orion_gpio"; ochip->chip.label = kstrdup(gc_label, GFP_KERNEL);
ochip->chip.request = orion_gpio_request; ochip->chip.request = orion_gpio_request;
ochip->chip.direction_input = orion_gpio_direction_input; ochip->chip.direction_input = orion_gpio_direction_input;
ochip->chip.get = orion_gpio_get; ochip->chip.get = orion_gpio_get;
......
...@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, ...@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls,
extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void);
extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void);
extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
struct s3c_cpufreq_config *cfg,
union s3c_iobank *iob);
extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
struct s3c_cpufreq_config *cfg,
union s3c_iobank *iob);
#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
#define s3c_cpufreq_debugfs_call(x) x #define s3c_cpufreq_debugfs_call(x) x
#else #else
...@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); ...@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
#ifdef CONFIG_S3C2410_IOTIMING #ifdef CONFIG_S3C2410_IOTIMING
extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
struct s3c_cpufreq_config *cfg,
union s3c_iobank *iob);
extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
struct s3c_iotimings *iot); struct s3c_iotimings *iot);
...@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, ...@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
struct s3c_iotimings *iot); struct s3c_iotimings *iot);
#else #else
#define s3c2410_iotiming_debugfs NULL
#define s3c2410_iotiming_calc NULL #define s3c2410_iotiming_calc NULL
#define s3c2410_iotiming_get NULL #define s3c2410_iotiming_get NULL
#define s3c2410_iotiming_set NULL #define s3c2410_iotiming_set NULL
...@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, ...@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
/* S3C2412 compatible routines */ /* S3C2412 compatible routines */
extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, #ifdef CONFIG_S3C2412_IOTIMING
struct s3c_iotimings *timings); extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
struct s3c_cpufreq_config *cfg,
union s3c_iobank *iob);
extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
struct s3c_iotimings *timings); struct s3c_iotimings *timings);
...@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, ...@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
struct s3c_iotimings *iot); struct s3c_iotimings *iot);
#else
#define s3c2412_iotiming_debugfs NULL
#define s3c2412_iotiming_calc NULL
#define s3c2412_iotiming_get NULL
#define s3c2412_iotiming_set NULL
#endif /* CONFIG_S3C2412_IOTIMING */
#ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG
#define s3c_freq_dbg(x...) printk(KERN_INFO x) #define s3c_freq_dbg(x...) printk(KERN_INFO x)
......
...@@ -60,6 +60,7 @@ typedef u64 cputime64_t; ...@@ -60,6 +60,7 @@ typedef u64 cputime64_t;
*/ */
#define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC) #define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC)
#define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC) #define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC)
#define usecs_to_cputime64(__usecs) usecs_to_cputime(__usecs)
/* /*
* Convert cputime <-> seconds * Convert cputime <-> seconds
......
...@@ -150,6 +150,8 @@ static inline cputime_t usecs_to_cputime(const unsigned long us) ...@@ -150,6 +150,8 @@ static inline cputime_t usecs_to_cputime(const unsigned long us)
return ct; return ct;
} }
#define usecs_to_cputime64(us) usecs_to_cputime(us)
/* /*
* Convert cputime <-> seconds * Convert cputime <-> seconds
*/ */
......
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