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linux

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    • Forked from hardware-enablement / Rockchip upstream enablement efforts / linux
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    be2net: memory barrier fixes on IBM p7 platform
    Sathya Perla authored and David S. Miller committed 
    The ibm p7 architecure seems to reorder memory accesses more
aggressively than previous ppc64 architectures. This requires memory
barriers to ensure that rx/tx doorbells are pressed only after
memory to be DMAed is written.

Signed-off-by: default avatarSathya Perla <sathyap@serverengines.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    f3eb62d2
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