rk3588.dtsi cleanup

arch/arm64/boot/dts/rockchip/rk3588.dtsi

@@ -136,6 +136,39 @@ i2s10_8ch: i2s@fde00000 {
 		status = "disabled";
 	};
 
+	hdmirx_ctrler: hdmirx-controller@fdee0000 {
+		compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx";
+		reg = <0x0 0xfdee0000 0x0 0x6000>;
+		reg-names = "hdmirx_regs";
+		power-domains = <&power RK3588_PD_VO1>;
+		rockchip,grf = <&sys_grf>;
+		rockchip,vo1_grf = <&vo1_grf>;
+		interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "cec", "hdmi", "dma";
+		clocks = <&cru ACLK_HDMIRX>,
+			 <&cru CLK_HDMIRX_AUD>,
+			 <&cru CLK_CR_PARA>,
+			 <&cru PCLK_HDMIRX>,
+			 <&cru CLK_HDMIRX_REF>,
+			 <&cru PCLK_S_HDMIRX>,
+			 <&cru HCLK_VO1>;
+		clock-names = "aclk",
+			      "audio",
+			      "cr_para",
+			      "pclk",
+			      "ref",
+			      "hclk_s_hdmirx",
+			      "hclk_vo1";
+		resets = <&cru SRST_A_HDMIRX>, <&cru SRST_P_HDMIRX>,
+			 <&cru SRST_HDMIRX_REF>, <&cru SRST_A_HDMIRX_BIU>;
+		reset-names = "rst_a", "rst_p", "rst_ref", "rst_biu";
+		pinctrl-0 = <&hdmim1_rx>;
+		pinctrl-names = "default";
+		status = "disabled";
+	};
+
 	pcie3x4: pcie@fe150000 {
 		compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
 		#address-cells = <3>;
@@ -420,38 +453,4 @@ pcie30phy: phy@fee80000 {
 		rockchip,phy-grf = <&pcie30_phy_grf>;
 		status = "disabled";
 	};
-
-        hdmirx_ctrler: hdmirx-controller@fdee0000 {
-		compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx";
-		reg = <0x0 0xfdee0000 0x0 0x6000>;
-                reg-names = "hdmirx_regs";
-                power-domains = <&power RK3588_PD_VO1>;
-                rockchip,grf = <&sys_grf>;
-                rockchip,vo1_grf = <&vo1_grf>;
-                interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>,
-                             <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH 0>,
-                             <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>;
-                interrupt-names = "cec", "hdmi", "dma";
-                clocks = <&cru ACLK_HDMIRX>,
-                         <&cru CLK_HDMIRX_AUD>,
-                         <&cru CLK_CR_PARA>,
-                         <&cru PCLK_HDMIRX>,
-                         <&cru CLK_HDMIRX_REF>,
-                         <&cru PCLK_S_HDMIRX>,
-                         <&cru HCLK_VO1>;
-                clock-names = "aclk",
-                              "audio",
-                              "cr_para",
-                              "pclk",
-                              "ref",
-                              "hclk_s_hdmirx",
-                              "hclk_vo1";
-                resets = <&cru SRST_A_HDMIRX>, <&cru SRST_P_HDMIRX>,
-                         <&cru SRST_HDMIRX_REF>, <&cru SRST_A_HDMIRX_BIU>;
-                reset-names = "rst_a", "rst_p", "rst_ref", "rst_biu";
-                pinctrl-0 = <&hdmim1_rx>;
-                pinctrl-names = "default";
-                status = "disabled";
-        };
-
 };