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		x - Hexadecimal
		b - Boolean ([1yYtT|0nNfF])
		i - IP address
		m - MAC address

	The access attributes are:
		a - Any (default)
		r - Read-only
		o - Write-once
		c - Change-default

	- CONFIG_ENV_FLAGS_LIST_DEFAULT
		Define this to a list (string) to define the ".flags"
		environment variable in the default or embedded environment.

	- CONFIG_ENV_FLAGS_LIST_STATIC
		Define this to a list (string) to define validation that
		should be done if an entry is not found in the ".flags"
		environment variable.  To override a setting in the static
		list, simply add an entry for the same variable name to the
		".flags" variable.

	If CONFIG_REGEX is defined, the variable_name above is evaluated as a
	regular expression. This allows multiple variables to define the same
	flags without explicitly listing them for each variable.

- CONFIG_ENV_ACCESS_IGNORE_FORCE
	If defined, don't allow the -f switch to env set override variable
	access flags.

- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only)
	This is set by OMAP boards for the max time that reset should
	be asserted. See doc/README.omap-reset-time for details on how
	the value can be calculated on a given board.
- CONFIG_USE_STDINT
	If stdint.h is available with your toolchain you can define this
	option to enable it. You can provide option 'USE_STDINT=1' when
	building U-Boot to enable this.

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The following definitions that deal with the placement and management
of environment data (variable area); in general, we support the
following configurations:

- CONFIG_BUILD_ENVCRC:

	Builds up envcrc with the target environment so that external utils
	may easily extract it and embed it in final U-Boot images.

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	Define this if the environment is in flash memory.

	a) The environment occupies one whole flash sector, which is
	   "embedded" in the text segment with the U-Boot code. This
	   happens usually with "bottom boot sector" or "top boot
	   sector" type flash chips, which have several smaller
	   sectors at the start or the end. For instance, such a
	   layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
	   such a case you would place the environment in one of the
	   4 kB sectors - with U-Boot code before and after it. With
	   "top boot sector" type flash chips, you would put the
	   environment in one of the last sectors, leaving a gap
	   between U-Boot and the environment.

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	   Offset of environment data (variable area) to the
	   beginning of flash memory; for instance, with bottom boot
	   type flash chips the second sector can be used: the offset
	   for this sector is given here.

	   CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
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	   This is just another way to specify the start address of
	   the flash sector containing the environment (instead of
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	- CONFIG_ENV_SECT_SIZE:
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	   Size of the sector containing the environment.


	b) Sometimes flash chips have few, equal sized, BIG sectors.
	   In such a case you don't want to spend a whole sector for
	   the environment.

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	   If you use this in combination with CONFIG_ENV_IS_IN_FLASH
	   and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
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	   of this flash sector for the environment. This saves
	   memory for the RAM copy of the environment.

	   It may also save flash memory if you decide to use this
	   when your environment is "embedded" within U-Boot code,
	   since then the remainder of the flash sector could be used
	   for U-Boot code. It should be pointed out that this is
	   STRONGLY DISCOURAGED from a robustness point of view:
	   updating the environment in flash makes it always
	   necessary to erase the WHOLE sector. If something goes
	   wrong before the contents has been restored from a copy in
	   RAM, your target system will be dead.

	- CONFIG_ENV_ADDR_REDUND
	  CONFIG_ENV_SIZE_REDUND
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	   These settings describe a second storage area used to hold
	   a redundant copy of the environment data, so that there is
	   a valid backup copy in case there is a power failure during
	   a "saveenv" operation.
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BE CAREFUL! Any changes to the flash layout, and some changes to the
source code will make it necessary to adapt <board>/u-boot.lds*
accordingly!


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	Define this if you have some non-volatile memory device
	(NVRAM, battery buffered SRAM) which you want to use for the
	environment.

	- CONFIG_ENV_ADDR:
	- CONFIG_ENV_SIZE:
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	  These two #defines are used to determine the memory area you
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	  want to use for environment. It is assumed that this memory
	  can just be read and written to, without any special
	  provision.

BE CAREFUL! The first access to the environment happens quite early
in U-Boot initialization (when we try to get the setting of for the
console baudrate). You *MUST* have mapped your NVRAM area then, or
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U-Boot will hang.

Please note that even with NVRAM we still use a copy of the
environment in RAM: we could work on NVRAM directly, but we want to
keep settings there always unmodified except somebody uses "saveenv"
to save the current settings.


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	Use this if you have an EEPROM or similar serial access
	device and a driver for it.

	- CONFIG_ENV_OFFSET:
	- CONFIG_ENV_SIZE:
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	  These two #defines specify the offset and size of the
	  environment area within the total memory of your EEPROM.

	- CONFIG_SYS_I2C_EEPROM_ADDR:
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	  If defined, specified the chip address of the EEPROM device.
	  The default address is zero.

	- CONFIG_SYS_I2C_EEPROM_BUS:
	  If defined, specified the i2c bus of the EEPROM device.

	- CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
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	  If defined, the number of bits used to address bytes in a
	  single page in the EEPROM device.  A 64 byte page, for example
	  would require six bits.

	- CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
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	  If defined, the number of milliseconds to delay between
	  page writes.	The default is zero milliseconds.
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	- CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
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	  The length in bytes of the EEPROM memory array address.  Note
	  that this is NOT the chip address length!

	- CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
	  EEPROM chips that implement "address overflow" are ones
	  like Catalyst 24WC04/08/16 which has 9/10/11 bits of
	  address and the extra bits end up in the "chip address" bit
	  slots. This makes a 24WC08 (1Kbyte) chip look like four 256
	  byte chips.

	  Note that we consider the length of the address field to
	  still be one byte because the extra address bits are hidden
	  in the chip address.

	- CONFIG_SYS_EEPROM_SIZE:
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	  The size in bytes of the EEPROM device.

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	- CONFIG_ENV_EEPROM_IS_ON_I2C
	  define this, if you have I2C and SPI activated, and your
	  EEPROM, which holds the environment, is on the I2C bus.

	- CONFIG_I2C_ENV_EEPROM_BUS
	  if you have an Environment on an EEPROM reached over
	  I2C muxes, you can define here, how to reach this
	  EEPROM. For example:

	  #define CONFIG_I2C_ENV_EEPROM_BUS	  1
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	  EEPROM which holds the environment, is reached over
	  a pca9547 i2c mux with address 0x70, channel 3.
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	Define this if you have a DataFlash memory device which you
	want to use for the environment.

	- CONFIG_ENV_OFFSET:
	- CONFIG_ENV_ADDR:
	- CONFIG_ENV_SIZE:

	  These three #defines specify the offset and size of the
	  environment area within the total memory of your DataFlash placed
	  at the specified address.

- CONFIG_ENV_IS_IN_SPI_FLASH:

	Define this if you have a SPI Flash memory device which you
	want to use for the environment.

	- CONFIG_ENV_OFFSET:
	- CONFIG_ENV_SIZE:

	  These two #defines specify the offset and size of the
	  environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
	  aligned to an erase sector boundary.

	- CONFIG_ENV_SECT_SIZE:

	  Define the SPI flash's sector size.

	- CONFIG_ENV_OFFSET_REDUND (optional):

	  This setting describes a second storage area of CONFIG_ENV_SIZE
	  size used to hold a redundant copy of the environment data, so
	  that there is a valid backup copy in case there is a power failure
	  during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
	  aligned to an erase sector boundary.

	- CONFIG_ENV_SPI_BUS (optional):
	- CONFIG_ENV_SPI_CS (optional):

	  Define the SPI bus and chip select. If not defined they will be 0.

	- CONFIG_ENV_SPI_MAX_HZ (optional):

	  Define the SPI max work clock. If not defined then use 1MHz.

	- CONFIG_ENV_SPI_MODE (optional):

	  Define the SPI work mode. If not defined then use SPI_MODE_3.

- CONFIG_ENV_IS_IN_REMOTE:

	Define this if you have a remote memory space which you
	want to use for the local device's environment.

	- CONFIG_ENV_ADDR:
	- CONFIG_ENV_SIZE:

	  These two #defines specify the address and size of the
	  environment area within the remote memory space. The
	  local device can get the environment from remote memory

BE CAREFUL! For some special cases, the local device can not use
"saveenv" command. For example, the local device will get the
environment stored in a remote NOR flash by SRIO or PCIE link,
but it can not erase, write this NOR flash by SRIO or PCIE interface.

	Define this if you have a NAND device which you want to use
	for the environment.

	- CONFIG_ENV_OFFSET:
	- CONFIG_ENV_SIZE:

	  These two #defines specify the offset and size of the environment
	  area within the first NAND device.  CONFIG_ENV_OFFSET must be
	  aligned to an erase block boundary.
	- CONFIG_ENV_OFFSET_REDUND (optional):
	  This setting describes a second storage area of CONFIG_ENV_SIZE
	  size used to hold a redundant copy of the environment data, so
	  that there is a valid backup copy in case there is a power failure
	  during a "saveenv" operation.	 CONFIG_ENV_OFFSET_RENDUND must be
	  aligned to an erase block boundary.

	- CONFIG_ENV_RANGE (optional):

	  Specifies the length of the region in which the environment
	  can be written.  This should be a multiple of the NAND device's
	  block size.  Specifying a range with more erase blocks than
	  are needed to hold CONFIG_ENV_SIZE allows bad blocks within
	  the range to be avoided.

	- CONFIG_ENV_OFFSET_OOB (optional):

	  Enables support for dynamically retrieving the offset of the
	  environment from block zero's out-of-band data.  The
	  "nand env.oob" command can be used to record this offset.
	  Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
	  using CONFIG_ENV_OFFSET_OOB.
- CONFIG_NAND_ENV_DST

	Defines address in RAM to which the nand_spl code should copy the
	environment. If redundant environment is used, it will be copied to
	CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.

- CONFIG_ENV_IS_IN_UBI:

	Define this if you have an UBI volume that you want to use for the
	environment.  This has the benefit of wear-leveling the environment
	accesses, which is important on NAND.

	- CONFIG_ENV_UBI_PART:

	  Define this to a string that is the mtd partition containing the UBI.

	- CONFIG_ENV_UBI_VOLUME:

	  Define this to the name of the volume that you want to store the
	  environment in.

	- CONFIG_ENV_UBI_VOLUME_REDUND:

	  Define this to the name of another volume to store a second copy of
	  the environment in.  This will enable redundant environments in UBI.
	  It is assumed that both volumes are in the same MTD partition.

	- CONFIG_UBI_SILENCE_MSG
	- CONFIG_UBIFS_SILENCE_MSG

	  You will probably want to define these to avoid a really noisy system
	  when storing the env in UBI.

- CONFIG_ENV_IS_IN_FAT:
       Define this if you want to use the FAT file system for the environment.

       - FAT_ENV_INTERFACE:

         Define this to a string that is the name of the block device.

       - FAT_ENV_DEV_AND_PART:

         Define this to a string to specify the partition of the device. It can
         be as following:

           "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
               - "D:P": device D partition P. Error occurs if device D has no
                        partition table.
               - "D:0": device D.
               - "D" or "D:": device D partition 1 if device D has partition
                              table, or the whole device D if has no partition
                              table.
               - "D:auto": first partition in device D with bootable flag set.
                           If none, first valid partition in device D. If no
                           partition table then means device D.

       - FAT_ENV_FILE:

         It's a string of the FAT file name. This file use to store the
         This should be defined. Otherwise it cannot save the environment file.
- CONFIG_ENV_IS_IN_MMC:

	Define this if you have an MMC device which you want to use for the
	environment.

	- CONFIG_SYS_MMC_ENV_DEV:

	  Specifies which MMC device the environment is stored in.

	- CONFIG_SYS_MMC_ENV_PART (optional):

	  Specifies which MMC partition the environment is stored in. If not
	  set, defaults to partition 0, the user area. Common values might be
	  1 (first MMC boot partition), 2 (second MMC boot partition).

	- CONFIG_ENV_OFFSET:
	- CONFIG_ENV_SIZE:

	  These two #defines specify the offset and size of the environment
	  area within the specified MMC device.

	  If offset is positive (the usual case), it is treated as relative to
	  the start of the MMC partition. If offset is negative, it is treated
	  as relative to the end of the MMC partition. This can be useful if
	  your board may be fitted with different MMC devices, which have
	  different sizes for the MMC partitions, and you always want the
	  environment placed at the very end of the partition, to leave the
	  maximum possible space before it, to store other data.

	  These two values are in units of bytes, but must be aligned to an
	  MMC sector boundary.

	- CONFIG_ENV_OFFSET_REDUND (optional):

	  Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
	  hold a redundant copy of the environment data. This provides a
	  valid backup copy in case the other copy is corrupted, e.g. due
	  to a power failure during a "saveenv" operation.

	  This value may also be positive or negative; this is handled in the
	  same way as CONFIG_ENV_OFFSET.

	  This value is also in units of bytes, but must also be aligned to
	  an MMC sector boundary.

	- CONFIG_ENV_SIZE_REDUND (optional):

	  This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
	  set. If this value is set, it must be set to the same value as
	  CONFIG_ENV_SIZE.

- CONFIG_SYS_SPI_INIT_OFFSET
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	Defines offset to the initial SPI buffer area in DPRAM. The
	area is used at an early stage (ROM part) if the environment
	is configured to reside in the SPI EEPROM: We need a 520 byte
	scratch DPRAM area. It is used between the two initialization
	calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems
	to be a good choice since it makes it far enough from the
	start of the data area as well as from the stack pointer.

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Please note that the environment is read-only until the monitor
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has been relocated to RAM and a RAM copy of the environment has been
created; also, when using EEPROM you will have to use getenv_f()
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until then to read environment variables.

The environment is protected by a CRC32 checksum. Before the monitor
is relocated into RAM, as a result of a bad CRC you will be working
with the compiled-in default environment - *silently*!!! [This is
necessary, because the first environment variable we need is the
"baudrate" setting for the console - if we have a bad CRC, we don't
have any device yet where we could complain.]
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Note: once the monitor has been relocated, then it will complain if
the default environment is used; a new CRC is computed as soon as you
use the "saveenv" command to store a valid environment.
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- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
		Echo the inverted Ethernet link state to the fault LED.
		Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
		      also needs to be defined.

- CONFIG_SYS_FAULT_MII_ADDR:
		MII address of the PHY to check for the Ethernet link state.
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- CONFIG_NS16550_MIN_FUNCTIONS:
		Define this if you desire to only have use of the NS16550_init
		and NS16550_putc functions for the serial driver located at
		drivers/serial/ns16550.c.  This option is useful for saving
		space for already greatly restricted images, including but not
		limited to NAND_SPL configurations.

- CONFIG_DISPLAY_BOARDINFO
		Display information about the board that U-Boot is running on
		when U-Boot starts up. The board function checkboard() is called
		to do this.

- CONFIG_DISPLAY_BOARDINFO_LATE
		Similar to the previous option, but display this information
		later, once stdio is running and output goes to the LCD, if
		present.

- CONFIG_BOARD_SIZE_LIMIT:
		Maximum size of the U-Boot image. When defined, the
		build system checks that the actual size does not
		exceed it.

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Low Level (hardware related) configuration options:
---------------------------------------------------
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- CONFIG_SYS_CACHELINE_SIZE:
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		Cache Line Size of the CPU.

- CONFIG_SYS_DEFAULT_IMMR:
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		Default address of the IMMR after system reset.
		Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
		and RPXsuper) to be able to adjust the position of
		the IMMR register after a reset.
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- CONFIG_SYS_CCSRBAR_DEFAULT:
		Default (power-on reset) physical address of CCSR on Freescale
		PowerPC SOCs.

- CONFIG_SYS_CCSRBAR:
		Virtual address of CCSR.  On a 32-bit build, this is typically
		the same value as CONFIG_SYS_CCSRBAR_DEFAULT.

		CONFIG_SYS_DEFAULT_IMMR must also be set to this value,
		for cross-platform code that uses that macro instead.

- CONFIG_SYS_CCSRBAR_PHYS:
		Physical address of CCSR.  CCSR can be relocated to a new
		physical address, if desired.  In this case, this macro should
		be set to that address.	 Otherwise, it should be set to the
		same value as CONFIG_SYS_CCSRBAR_DEFAULT.  For example, CCSR
		is typically relocated on 36-bit builds.  It is recommended
		that this macro be defined via the _HIGH and _LOW macros:

		#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
			* 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)

- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
		Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS.	This value is typically
		either 0 (32-bit build) or 0xF (36-bit build).	This macro is
		used in assembly code, so it must not contain typecasts or
		integer size suffixes (e.g. "ULL").

- CONFIG_SYS_CCSRBAR_PHYS_LOW:
		Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS.  This macro is
		used in assembly code, so it must not contain typecasts or
		integer size suffixes (e.g. "ULL").

- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
		If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
		forced to a value that ensures that CCSR is not relocated.

- Floppy Disk Support:
		CONFIG_SYS_FDC_DRIVE_NUMBER

		the default drive number (default value 0)

		CONFIG_SYS_ISA_IO_STRIDE
		defines the spacing between FDC chipset registers
		(default value 1)

		CONFIG_SYS_ISA_IO_OFFSET
		defines the offset of register from address. It
		depends on which part of the data bus is connected to
		the FDC chipset. (default value 0)
		If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and
		CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their
		default value.
		if CONFIG_SYS_FDC_HW_INIT is defined, then the function
		fdc_hw_init() is called at the beginning of the FDC
		setup. fdc_hw_init() must be provided by the board
		source code. It is used to make hardware-dependent
		initializations.
- CONFIG_IDE_AHB:
		Most IDE controllers were designed to be connected with PCI
		interface. Only few of them were designed for AHB interface.
		When software is doing ATA command and data transfer to
		IDE devices through IDE-AHB controller, some additional
		registers accessing to these kind of IDE-AHB controller
- CONFIG_SYS_IMMR:	Physical address of the Internal Memory.
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		DO NOT CHANGE unless you know exactly what you're
		doing! (11-4) [MPC8xx/82xx systems only]
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- CONFIG_SYS_INIT_RAM_ADDR:
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		Start address of memory area that can be used for
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		initial data and stack; please note that this must be
		writable memory that is working WITHOUT special
		initialization, i. e. you CANNOT use normal RAM which
		will become available only after programming the
		memory controller and running certain initialization
		sequences.

		U-Boot uses the following memory types:
		- MPC8xx and MPC8260: IMMR (internal memory of the CPU)
		- MPC824X: data cache
		- PPC4xx:  data cache

- CONFIG_SYS_GBL_DATA_OFFSET:
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		Offset of the initial data structure in the memory
		area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
		CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
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		data is located at the end of the available space
		(sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
		CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
		below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
		CONFIG_SYS_GBL_DATA_OFFSET) downward.
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	Note:
		On the MPC824X (or other systems that use the data
		cache for initial memory) the address chosen for
		CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
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		point to an otherwise UNUSED address space between
		the top of RAM and the start of the PCI space.

- CONFIG_SYS_SIUMCR:	SIU Module Configuration (11-6)
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- CONFIG_SYS_SYPCR:	System Protection Control (11-9)
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- CONFIG_SYS_TBSCR:	Time Base Status and Control (11-26)
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- CONFIG_SYS_PISCR:	Periodic Interrupt Status and Control (11-31)
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- CONFIG_SYS_PLPRCR:	PLL, Low-Power, and Reset Control Register (15-30)
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- CONFIG_SYS_SCCR:	System Clock and reset Control Register (15-27)
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- CONFIG_SYS_OR_TIMING_SDRAM:
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		SDRAM timing

- CONFIG_SYS_MAMR_PTA:
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		periodic timer for refresh

- CONFIG_SYS_DER:	Debug Event Register (37-47)
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- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
  CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
  CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM,
  CONFIG_SYS_BR1_PRELIM:
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		Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)

- SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE,
  CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM,
  CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
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		Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)

- CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K,
  CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL:
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		Machine Mode Register and Memory Periodic Timer
		Prescaler definitions (SDRAM timing)

- CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]:
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		enable I2C microcode relocation patch (MPC8xx);
		define relocation offset in DPRAM [DSP2]

- CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]:
		enable SMC microcode relocation patch (MPC8xx);
		define relocation offset in DPRAM [SMC1]

- CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]:
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		enable SPI microcode relocation patch (MPC8xx);
		define relocation offset in DPRAM [SCC4]

- CONFIG_SYS_USE_OSCCLK:
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		Use OSCM clock mode on MBX8xx board. Be careful,
		wrong setting might damage your board. Read
		doc/README.MBX before setting this variable!

- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
		Offset of the bootmode word in DPRAM used by post
		(Power On Self Tests). This definition overrides
		#define'd default value in commproc.h resp.
		cpm_8260.h.
- CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB,
  CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL,
  CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS,
  CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB,
  CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
  CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,
  CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,
  CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)
		Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set.
- CONFIG_PCI_DISABLE_PCIE:
		Disable PCI-Express on systems where it is supported but not
		required.

		Only scan through and get the devices on the buses.
		Don't do any setup work, presumably because someone or
		something has already done it, and we don't need to do it
		a second time.	Useful for platforms that are pre-booted
		by coreboot or similar.

- CONFIG_PCI_INDIRECT_BRIDGE:
		Enable support for indirect PCI bridges.

- CONFIG_SYS_SRIO:
		Chip has SRIO or not

- CONFIG_SRIO1:
		Board has SRIO 1 port available

- CONFIG_SRIO2:
		Board has SRIO 2 port available

- CONFIG_SRIO_PCIE_BOOT_MASTER
		Board can support master function for Boot from SRIO and PCIE

- CONFIG_SYS_SRIOn_MEM_VIRT:
		Virtual Address of SRIO port 'n' memory region

- CONFIG_SYS_SRIOn_MEM_PHYS:
		Physical Address of SRIO port 'n' memory region

- CONFIG_SYS_SRIOn_MEM_SIZE:
		Size of SRIO port 'n' memory region

- CONFIG_SYS_NAND_BUSWIDTH_16BIT
		Defined to tell the NAND controller that the NAND chip is using
		a 16 bit bus.
		Not all NAND drivers use this symbol.
		Example of drivers that use it:
		- drivers/mtd/nand/ndfc.c
		- drivers/mtd/nand/mxc_nand.c

- CONFIG_SYS_NDFC_EBC0_CFG
		Sets the EBC0_CFG register for the NDFC. If not defined
		a default value will be used.

- CONFIG_SPD_EEPROM
		Get DDR timing information from an I2C EEPROM. Common
		with pluggable memory modules such as SODIMMs

  SPD_EEPROM_ADDRESS
		I2C address of the SPD EEPROM

- CONFIG_SYS_SPD_BUS_NUM
		If SPD EEPROM is on an I2C bus other than the first
		one, specify here. Note that the value must resolve
		to something your driver can deal with.
- CONFIG_SYS_DDR_RAW_TIMING
		Get DDR timing information from other than SPD. Common with
		soldered DDR chips onboard without SPD. DDR raw timing
		parameters are extracted from datasheet and hard-coded into
		header files or board specific files.

- CONFIG_FSL_DDR_INTERACTIVE
		Enable interactive DDR debugging. See doc/README.fsl-ddr.

- CONFIG_FSL_DDR_SYNC_REFRESH
		Enable sync of refresh for multiple controllers.

- CONFIG_FSL_DDR_BIST
		Enable built-in memory test for Freescale DDR controllers.

- CONFIG_SYS_83XX_DDR_USES_CS0
		Only for 83xx systems. If specified, then DDR should
		be configured using CS0 and CS1 instead of CS2 and CS3.
- CONFIG_ETHER_ON_FEC[12]
		Define to enable FEC[12] on a 8xx series processor.

- CONFIG_FEC[12]_PHY
		Define to the hardcoded PHY address which corresponds
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		to the given FEC; i. e.
			#define CONFIG_FEC1_PHY 4
		means that the PHY with address 4 is connected to FEC1

		When set to -1, means to probe for first available.

- CONFIG_FEC[12]_PHY_NORXERR
		The PHY does not have a RXERR line (RMII only).
		(so program the FEC to ignore it).

- CONFIG_RMII
		Enable RMII mode for all FECs.
		Note that this is a global option, we can't
		have one FEC in standard MII mode and another in RMII mode.

- CONFIG_CRC32_VERIFY
		Add a verify option to the crc32 command.
		The syntax is:

		=> crc32 -v <address> <count> <crc32>

		Where address/count indicate a memory area
		and crc32 is the correct crc32 which the
		area should have.

- CONFIG_LOOPW
		Add the "loopw" memory command. This only takes effect if
		the memory commands are activated globally (CONFIG_CMD_MEM).
- CONFIG_MX_CYCLIC
		Add the "mdc" and "mwc" memory commands. These are cyclic
		"md/mw" commands.
		Examples:

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		=> mdc.b 10 4 500
		This command will print 4 bytes (10,11,12,13) each 500 ms.

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		=> mwc.l 100 12345678 10
		This command will write 12345678 to address 100 all 10 ms.

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		This only takes effect if the memory commands are activated
- CONFIG_SKIP_LOWLEVEL_INIT
		[ARM, NDS32, MIPS only] If this variable is defined, then certain
		low level initializations (like setting up the memory
		controller) are omitted and/or U-Boot does not
		relocate itself into RAM.

		Normally this variable MUST NOT be defined. The only
		exception is when U-Boot is loaded (to RAM) by some
		other boot loader or by a debugger which performs
		these initializations itself.
- CONFIG_SKIP_LOWLEVEL_INIT_ONLY
		[ARM926EJ-S only] This allows just the call to lowlevel_init()
		to be skipped. The normal CPU15 init (such as enabling the
		instruction cache) is still performed.

- CONFIG_SPL_BUILD
		Modifies the behaviour of start.S when compiling a loader
		that is executed before the actual U-Boot. E.g. when
		compiling a NAND SPL.
- CONFIG_TPL_BUILD
		Modifies the behaviour of start.S  when compiling a loader
		that is executed after the SPL and before the actual U-Boot.
		It is loaded by the SPL.

- CONFIG_SYS_MPC85XX_NO_RESETVEC
		Only for 85xx systems. If this variable is specified, the section
		.resetvec is not kept and the section .bootpg is placed in the
		previous 4k of the .text section.

- CONFIG_ARCH_MAP_SYSMEM
		Generally U-Boot (and in particular the md command) uses
		effective address. It is therefore not necessary to regard
		U-Boot address as virtual addresses that need to be translated
		to physical addresses. However, sandbox requires this, since
		it maintains its own little RAM buffer which contains all
		addressable memory. This option causes some memory accesses
		to be mapped through map_sysmem() / unmap_sysmem().

- CONFIG_USE_ARCH_MEMCPY
  CONFIG_USE_ARCH_MEMSET
		If these options are used a optimized version of memcpy/memset will
		be used if available. These functions may be faster under some
		conditions but may increase the binary size.

- CONFIG_X86_RESET_VECTOR
		If defined, the x86 reset vector code is included. This is not
		needed when U-Boot is running from Coreboot.
- CONFIG_SYS_MPUCLK
		Defines the MPU clock speed (in MHz).

		NOTE : currently only supported on AM335x platforms.
- CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
		Enables the RTC32K OSC on AM33xx based plattforms

- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
		Option to disable subpage write in NAND driver
		driver that uses this:
		drivers/mtd/nand/davinci_nand.c

Freescale QE/FMAN Firmware Support:
-----------------------------------

The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
loading of "firmware", which is encoded in the QE firmware binary format.
This firmware often needs to be loaded during U-Boot booting, so macros
are used to identify the storage device (NOR flash, SPI, etc) and the address
within that device.

- CONFIG_SYS_FMAN_FW_ADDR
	The address in the storage device where the FMAN microcode is located.  The
	meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
	is also specified.

- CONFIG_SYS_QE_FW_ADDR
	The address in the storage device where the QE microcode is located.  The
	meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
	is also specified.

- CONFIG_SYS_QE_FMAN_FW_LENGTH
	The maximum possible size of the firmware.  The firmware binary format
	has a field that specifies the actual size of the firmware, but it
	might not be possible to read any part of the firmware unless some
	local storage is allocated to hold the entire firmware first.

- CONFIG_SYS_QE_FMAN_FW_IN_NOR
	Specifies that QE/FMAN firmware is located in NOR flash, mapped as
	normal addressable memory via the LBC.  CONFIG_SYS_FMAN_FW_ADDR is the
	virtual address in NOR flash.

- CONFIG_SYS_QE_FMAN_FW_IN_NAND
	Specifies that QE/FMAN firmware is located in NAND flash.
	CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.

- CONFIG_SYS_QE_FMAN_FW_IN_MMC
	Specifies that QE/FMAN firmware is located on the primary SD/MMC
	device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.

- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH
	Specifies that QE/FMAN firmware is located on the primary SPI
	device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.

- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
	Specifies that QE/FMAN firmware is located in the remote (master)
	memory space.	CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
	can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
	window->master inbound window->master LAW->the ucode address in
	master's memory space.
Freescale Layerscape Management Complex Firmware Support:
---------------------------------------------------------
The Freescale Layerscape Management Complex (MC) supports the loading of
"firmware".
This firmware often needs to be loaded during U-Boot booting, so macros
are used to identify the storage device (NOR flash, SPI, etc) and the address
within that device.

- CONFIG_FSL_MC_ENET
	Enable the MC driver for Layerscape SoCs.

- CONFIG_SYS_LS_MC_FW_ADDR
	The address in the storage device where the firmware is located.  The
	meaning of this address depends on which CONFIG_SYS_LS_MC_FW_IN_xxx macro
	is also specified.

- CONFIG_SYS_LS_MC_FW_LENGTH
	The maximum possible size of the firmware.  The firmware binary format
	has a field that specifies the actual size of the firmware, but it
	might not be possible to read any part of the firmware unless some
	local storage is allocated to hold the entire firmware first.

- CONFIG_SYS_LS_MC_FW_IN_NOR
	Specifies that MC firmware is located in NOR flash, mapped as
	normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the
	virtual address in NOR flash.

Freescale Layerscape Debug Server Support:
-------------------------------------------
The Freescale Layerscape Debug Server Support supports the loading of
"Debug Server firmware" and triggering SP boot-rom.
This firmware often needs to be loaded during U-Boot booting.

- CONFIG_FSL_DEBUG_SERVER
	Enable the Debug Server for Layerscape SoCs.

- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
	Define minimum DDR size required for debug server image

- CONFIG_SYS_MC_RSV_MEM_ALIGN
	Define alignment of reserved memory MC requires
Reproducible builds
-------------------

In order to achieve reproducible builds, timestamps used in the U-Boot build
process have to be set to a fixed value.

This is done using the SOURCE_DATE_EPOCH environment variable.
SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration
option for U-Boot or an environment variable in U-Boot.

SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.

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Building the Software:
======================

Building U-Boot has been tested in several native build environments
and in many different cross environments. Of course we cannot support
all possibly existing versions of cross development tools in all
(potentially obsolete) versions. In case of tool chain problems we
recommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK)
which is extensively used to build and test U-Boot.
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If you are not using a native environment, it is assumed that you
have GNU cross compiling tools available in your path. In this case,
you must set the environment variable CROSS_COMPILE in your shell.
Note that no changes to the Makefile or any other source files are
necessary. For example using the ELDK on a 4xx CPU, please enter:
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	$ CROSS_COMPILE=ppc_4xx-
	$ export CROSS_COMPILE
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Note: If you wish to generate Windows versions of the utilities in
      the tools directory you can use the MinGW toolchain
      (http://www.mingw.org).  Set your HOST tools to the MinGW
      toolchain and execute 'make tools'.  For example:

       $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools

      Binaries such as tools/mkimage.exe will be created which can
      be executed on computers running Windows.

U-Boot is intended to be simple to build. After installing the
sources you must configure U-Boot for one specific board type. This
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is done by typing:

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where "NAME_defconfig" is the name of one of the existing configu-
rations; see boards.cfg for supported names.
Note: for some board special configuration names may exist; check if