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Commit 33d413fc authored by Tom Rini's avatar Tom Rini
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Merge branch 'master' of git://git.denx.de/u-boot-sh

parents 2c30af8f 5fe3aefd
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with 9 additions and 46 deletions
...@@ -12,7 +12,7 @@ PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb -ffreestanding ...@@ -12,7 +12,7 @@ PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb -ffreestanding
else # SH2 else # SH2
PLATFORM_CPPFLAGS += -m3e -mb PLATFORM_CPPFLAGS += -m3e -mb
endif endif
PLATFORM_CPPFLAGS += $(call cc-option,-mno-fdpic) PLATFORM_CPPFLAGS += -DCONFIG_SH2 $(call cc-option,-mno-fdpic)
PLATFORM_RELFLAGS += -ffixed-r13 PLATFORM_RELFLAGS += -ffixed-r13
PLATFORM_LDFLAGS += $(ENDIANNESS) PLATFORM_LDFLAGS += $(ENDIANNESS)
...@@ -23,11 +23,7 @@ ...@@ -23,11 +23,7 @@
int checkcpu(void) int checkcpu(void)
{ {
#if defined(CONFIG_SH2A)
puts("CPU: SH2A\n");
#else
puts("CPU: SH2\n"); puts("CPU: SH2\n");
#endif
return 0; return 0;
} }
......
...@@ -11,5 +11,5 @@ ...@@ -11,5 +11,5 @@
# SPDX-License-Identifier: GPL-2.0+ # SPDX-License-Identifier: GPL-2.0+
# #
# #
PLATFORM_CPPFLAGS += -m3 PLATFORM_CPPFLAGS += -DCONFIG_SH3 -m3
PLATFORM_RELFLAGS += -ffixed-r13 PLATFORM_RELFLAGS += -ffixed-r13
...@@ -8,5 +8,5 @@ ...@@ -8,5 +8,5 @@
# SPDX-License-Identifier: GPL-2.0+ # SPDX-License-Identifier: GPL-2.0+
# #
# #
PLATFORM_CPPFLAGS += -m4-nofpu PLATFORM_CPPFLAGS += -DCONFIG_SH4 -m4-nofpu
PLATFORM_RELFLAGS += -ffixed-r13 PLATFORM_RELFLAGS += -ffixed-r13
...@@ -13,11 +13,7 @@ ...@@ -13,11 +13,7 @@
int checkcpu(void) int checkcpu(void)
{ {
#ifdef CONFIG_SH4A
puts("CPU: SH-4A\n");
#else
puts("CPU: SH4\n"); puts("CPU: SH4\n");
#endif
return 0; return 0;
} }
......
#ifndef __ASM_SH_CACHE_H #ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H #define __ASM_SH_CACHE_H
#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) #if defined(CONFIG_SH4)
int cache_control(unsigned int cmd); int cache_control(unsigned int cmd);
...@@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; }; ...@@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; };
*/ */
#define ARCH_DMA_MINALIGN 32 #define ARCH_DMA_MINALIGN 32
#endif /* CONFIG_SH4 || CONFIG_SH4A */ #endif /* CONFIG_SH4 */
/* /*
* Use the L1 data cache line size value for the minimum DMA buffer alignment * Use the L1 data cache line size value for the minimum DMA buffer alignment
......
#ifndef _ASM_SH_PROCESSOR_H_ #ifndef _ASM_SH_PROCESSOR_H_
#define _ASM_SH_PROCESSOR_H_ #define _ASM_SH_PROCESSOR_H_
#if defined(CONFIG_SH2) || \ #if defined(CONFIG_SH2)
defined (CONFIG_SH2A)
# include <asm/cpu_sh2.h> # include <asm/cpu_sh2.h>
#elif defined (CONFIG_SH3) #elif defined(CONFIG_SH3)
# include <asm/cpu_sh3.h> # include <asm/cpu_sh3.h>
#elif defined (CONFIG_SH4) || \ #elif defined(CONFIG_SH4)
defined (CONFIG_SH4A)
# include <asm/cpu_sh4.h> # include <asm/cpu_sh4.h>
#endif #endif
#endif #endif
...@@ -84,5 +84,5 @@ void __udelay(unsigned long usec) ...@@ -84,5 +84,5 @@ void __udelay(unsigned long usec)
unsigned long get_tbclk(void) unsigned long get_tbclk(void)
{ {
return CONFIG_SYS_HZ; return CONFIG_SH_CMT_CLK_FREQ;
} }
...@@ -10,8 +10,6 @@ ...@@ -10,8 +10,6 @@
#define __MIGO_R_H #define __MIGO_R_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7722 1 #define CONFIG_CPU_SH7722 1
#define CONFIG_MIGO_R 1 #define CONFIG_MIGO_R 1
......
...@@ -11,8 +11,6 @@ ...@@ -11,8 +11,6 @@
#define __AP325RXA_H #define __AP325RXA_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7723 1 #define CONFIG_CPU_SH7723 1
#define CONFIG_AP325RXA 1 #define CONFIG_AP325RXA 1
......
...@@ -10,9 +10,6 @@ ...@@ -10,9 +10,6 @@
#define __AP_SH4A_4A_H #define __AP_SH4A_4A_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7734 1 #define CONFIG_CPU_SH7734 1
#define CONFIG_AP_SH4A_4A 1 #define CONFIG_AP_SH4A_4A 1
#define CONFIG_400MHZ_MODE 1 #define CONFIG_400MHZ_MODE 1
......
...@@ -23,9 +23,6 @@ ...@@ -23,9 +23,6 @@
*/ */
#undef DEBUG #undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7724 1 #define CONFIG_CPU_SH7724 1
#define CONFIG_BOARD_LATE_INIT 1 #define CONFIG_BOARD_LATE_INIT 1
#define CONFIG_ECOVEC 1 #define CONFIG_ECOVEC 1
......
...@@ -10,8 +10,6 @@ ...@@ -10,8 +10,6 @@
#ifndef __ESPT_H #ifndef __ESPT_H
#define __ESPT_H #define __ESPT_H
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7763 1 #define CONFIG_CPU_SH7763 1
#define CONFIG_ESPT 1 #define CONFIG_ESPT 1
#define __LITTLE_ENDIAN 1 #define __LITTLE_ENDIAN 1
......
...@@ -24,8 +24,6 @@ ...@@ -24,8 +24,6 @@
#define CONFIG_VERSION_VARIABLE #define CONFIG_VERSION_VARIABLE
/* CPU and platform */ /* CPU and platform */
#define CONFIG_SH 1
#define CONFIG_SH3 1
#define CONFIG_CPU_SH7720 1 #define CONFIG_CPU_SH7720 1
#define CONFIG_MPR2 1 #define CONFIG_MPR2 1
......
...@@ -9,8 +9,6 @@ ...@@ -9,8 +9,6 @@
#ifndef __MS7720SE_H #ifndef __MS7720SE_H
#define __MS7720SE_H #define __MS7720SE_H
#define CONFIG_SH 1
#define CONFIG_SH3 1
#define CONFIG_CPU_SH7720 1 #define CONFIG_CPU_SH7720 1
#define CONFIG_MS7720SE 1 #define CONFIG_MS7720SE 1
......
...@@ -9,8 +9,6 @@ ...@@ -9,8 +9,6 @@
#ifndef __MS7722SE_H #ifndef __MS7722SE_H
#define __MS7722SE_H #define __MS7722SE_H
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7722 1 #define CONFIG_CPU_SH7722 1
#define CONFIG_MS7722SE 1 #define CONFIG_MS7722SE 1
......
...@@ -9,8 +9,6 @@ ...@@ -9,8 +9,6 @@
#ifndef __MS7750SE_H #ifndef __MS7750SE_H
#define __MS7750SE_H #define __MS7750SE_H
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7750 1 #define CONFIG_CPU_SH7750 1
/* #define CONFIG_CPU_SH7751 1 */ /* #define CONFIG_CPU_SH7751 1 */
/* #define CONFIG_CPU_TYPE_R 1 */ /* #define CONFIG_CPU_TYPE_R 1 */
......
...@@ -10,9 +10,6 @@ ...@@ -10,9 +10,6 @@
#define __R0P7734_H #define __R0P7734_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7734 1 #define CONFIG_CPU_SH7734 1
#define CONFIG_R0P7734 1 #define CONFIG_R0P7734 1
#define CONFIG_400MHZ_MODE 1 #define CONFIG_400MHZ_MODE 1
......
...@@ -3,8 +3,6 @@ ...@@ -3,8 +3,6 @@
#undef DEBUG #undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7751 1 #define CONFIG_CPU_SH7751 1
#define CONFIG_CPU_SH_TYPE_R 1 #define CONFIG_CPU_SH_TYPE_R 1
#define CONFIG_R2DPLUS 1 #define CONFIG_R2DPLUS 1
......
...@@ -11,8 +11,6 @@ ...@@ -11,8 +11,6 @@
#define __R7780RP_H #define __R7780RP_H
#undef DEBUG #undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7780 1 #define CONFIG_CPU_SH7780 1
#define CONFIG_R7780MP 1 #define CONFIG_R7780MP 1
#define CONFIG_SYS_R7780MP_OLD_FLASH 1 #define CONFIG_SYS_R7780MP_OLD_FLASH 1
......
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