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Nicolas Frattaroli
Rk3576 Downstream U-Boot
Commits
be5048f1
Commit
be5048f1
authored
19 years ago
by
Wolfgang Denk
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Add Nat Semi DP83865 PHY support to MPC85xx TSEC driver
Patch by Murray Jensen, 08 Jul 2005
parent
ca27381d
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CHANGELOG
+3
-0
3 additions, 0 deletions
CHANGELOG
drivers/tsec.c
+51
-0
51 additions, 0 deletions
drivers/tsec.c
drivers/tsec.h
+10
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10 additions, 0 deletions
drivers/tsec.h
with
64 additions
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0 deletions
CHANGELOG
+
3
−
0
View file @
be5048f1
...
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@@ -2,6 +2,9 @@
Changes since U-Boot 1.1.4:
======================================================================
* Add Nat Semi DP83865 PHY support to MPC85xx TSEC driver
Patch by Murray Jensen, 08 Jul 2005
* Add (some) definitions for the MPC85xx local bus controller
Patch by Murray Jensen, 08 Jul 2005
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drivers/tsec.c
+
51
−
0
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be5048f1
...
...
@@ -940,6 +940,56 @@ static struct phy_info phy_info_lxt971 = {
},
};
/* Parse the DP83865's link and auto-neg status register for speed and duplex
* information */
uint
mii_parse_dp83865_lanr
(
uint
mii_reg
,
struct
tsec_private
*
priv
)
{
switch
(
mii_reg
&
MIIM_DP83865_SPD_MASK
)
{
case
MIIM_DP83865_SPD_1000
:
priv
->
speed
=
1000
;
break
;
case
MIIM_DP83865_SPD_100
:
priv
->
speed
=
100
;
break
;
default:
priv
->
speed
=
10
;
break
;
}
if
(
mii_reg
&
MIIM_DP83865_DPX_FULL
)
priv
->
duplexity
=
1
;
else
priv
->
duplexity
=
0
;
return
0
;
}
struct
phy_info
phy_info_dp83865
=
{
0x20005c7
,
"NatSemi DP83865"
,
4
,
(
struct
phy_cmd
[])
{
/* config */
{
MIIM_CONTROL
,
MIIM_DP83865_CR_INIT
,
NULL
},
{
miim_end
,}
},
(
struct
phy_cmd
[])
{
/* startup */
/* Status is read once to clear old link state */
{
MIIM_STATUS
,
miim_read
,
NULL
},
/* Auto-negotiate */
{
MIIM_STATUS
,
miim_read
,
&
mii_parse_sr
},
/* Read the link and auto-neg status */
{
MIIM_DP83865_LANR
,
miim_read
,
&
mii_parse_dp83865_lanr
},
{
miim_end
,}
},
(
struct
phy_cmd
[])
{
/* shutdown */
{
miim_end
,}
},
};
struct
phy_info
*
phy_info
[]
=
{
#if 0
&phy_info_cis8201,
...
...
@@ -949,6 +999,7 @@ struct phy_info *phy_info[] = {
&
phy_info_M88E1111S
,
&
phy_info_dm9161
,
&
phy_info_lxt971
,
&
phy_info_dp83865
,
NULL
};
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drivers/tsec.h
+
10
−
0
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be5048f1
...
...
@@ -168,6 +168,16 @@
#define MIIM_LXT971_SR2_100HDX 0x4000
/* 100 Mbit half duplex selected */
#define MIIM_LXT971_SR2_100FDX 0x4200
/* 100 Mbit full duplex selected */
/* DP83865 Control register values */
#define MIIM_DP83865_CR_INIT 0x9200
/* DP83865 Link and Auto-Neg Status Register */
#define MIIM_DP83865_LANR 0x11
#define MIIM_DP83865_SPD_MASK 0x0018
#define MIIM_DP83865_SPD_1000 0x0010
#define MIIM_DP83865_SPD_100 0x0008
#define MIIM_DP83865_DPX_FULL 0x0002
#define MIIM_READ_COMMAND 0x00000001
#define MRBLR_INIT_SETTINGS PKTSIZE_ALIGN
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