Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>

Create splash.c/h to put the function and any future common splash
screen code in.

Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>

When compressed image is loaded, it must be decompressed
to an aligned address + 2 to avoid unaligned access exception
on some ARM platforms.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Wolfgang Denk <wd@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>

At present mkimage is set up to always build with image signing support.
This means that the SSL libraries (e.g. libssl-dev) are always required.

Adjust things so that mkimage can be built with and without image signing,
controlled by the presence of CONFIG_FIT_SIGNATURE in the board config file.

If CONFIG_FIT_SIGNATURE is not enabled, then mkimage will report a warning
that signing is not supported. If the option is enabled, but libraries are
not available, then a build error similar to this will be shown:

lib/rsa/rsa-sign.c:26:25: fatal error: openssl/rsa.h: No such file or directory

Signed-off-by: Simon Glass <sjg@chromium.org>

In a7143215 we add a check at the end of findfdt to make sure we have
updated it from undefined and if not, warn the user.  This however
forgot a ';' on the end of the previous last test.

Signed-off-by: Tom Rini <trini@ti.com>

With CONFIG_SYS_64BIT_LBA, lbaint_t gets defined as a 64-bit type,
which is required to represent block numbers for storage devices that
exceed 2TiB (the block size usually is 512B), e.g. recent hard drives.

For some obscure reason, the current U-Boot code uses lbaint_t for the
number of blocks to read (a rather optimistic estimation of how RAM
sizes will evolve), but not for the starting address. Trying to access
blocks beyond the 2TiB boundary will simply wrap around and read a
block within the 0..2TiB range.

We now use lbaint_t for block start addresses, too. This required
changes to all block drivers as the signature of block_read(),
block_write() and block_erase() in block_dev_desc_t changed.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>

We want to sign and verify images using sandbox, so enable these options.

Signed-off-by: Simon Glass <sjg@chromium.org>

While signing images is useful, it does not provide complete protection
against several types of attack. For example, it it possible to create a
FIT with the same signed images, but with the configuration changed such
that a different one is selected (mix and match attack). It is also possible
to substitute a signed image from an older FIT version into a newer FIT
(roll-back attack).

Add support for signing of FIT configurations using the libfdt's region
support.

Please see doc/uImage.FIT/signature.txt for more information.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add a function to find regions in device tree given a list of nodes to
include and properties to exclude.

See the header file for full documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>

RSA provides a public key encryption facility which is ideal for image
signing and verification.

Images are signed using a private key by mkimage. Then at run-time, the
images are verified using a private key.

This implementation uses openssl for the host part (mkimage). To avoid
bringing large libraries into the U-Boot binary, the RSA public key
is encoded using a simple numeric representation in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add support for signing images using a new signature node. The process
is handled by fdt_add_verification_data() which now takes parameters to
provide the keys and related information.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add a structure to describe an algorithm which can sign and (later) verify
images.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add configs to enable tracing when it is needed.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add tracing to Exynos5 boards, so that tracing can be enabled when building
with 'make FTRACE=1'. We use a 16MB trace buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>

For tracing it is useful to run as much of U-Boot as possible so as to get
a complete picture. Quite a bit of work happens in bootm, and we don't want
to have to stop tracing before bootm starts.

Add a way of doing a 'fake' boot of the OS - which does everything up to
the point where U-Boot is about to jump to the OS image. This allows
tracing to record right until the end.

This requires arch support to work.

Signed-off-by: Simon Glass <sjg@chromium.org>

At present the bootm code is mostly duplicated for the plain 'bootm'
command and its sub-command variant. This makes the code harder to
maintain and means that changes must be made to several places.

Introduce do_bootm_states() which performs selected portions of the bootm
work, so that both plain 'bootm' and 'bootm <sub_command>' can use the
same code.

Additional duplication exists in bootz, so tidy that up as well. This
is not intended to change behaviour, apart from minor fixes where the
previously-duplicated code missed some chunks of code.

Signed-off-by: Simon Glass <sjg@chromium.org>

Support tracing on sandbox by adding suitable CONFIG options. To enable it,
compile U-Boot with FTRACE=1.

The timer functions are marked to skip tracing, since these are called from
the tracing code itself, and we want to avoid an infinite loop.

Signed-off-by: Simon Glass <sjg@chromium.org>

Add hooks for tracing to generic board, including:

- allow early tracing to start early as possible in U-Boot
- reserve memory for trace buffer
- copy early trace buffer to main trace buffer after relocation
- setup full tracing support after relocation

Signed-off-by: Simon Glass <sjg@chromium.org>

Add a library which supports tracing of execution using built-in gcc
features and a microsecond timer. This can be used to record a list of
function which are executed, along with a timestamp for each. Later
this information can be sent to the host for processing.

Signed-off-by: Simon Glass <sjg@chromium.org>

Move bootstage's numbering printing code into a generic place so that it can
be used by tracing also.

Signed-off-by: Simon Glass <sjg@chromium.org>

I am not sure of the meaning of extern inline, but this gives errors
when building with function instrumenting enabled. Change these functions
to static inline.

Signed-off-by: Simon Glass <sjg@chromium.org>

This patch initiates cros-ec in board_init() to enable it for smdk5250.

This patch depends on the patch in the MMC series that brings in exynos5-dt.c.
Refer to http://patchwork.ozlabs.org/patch/240084

.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>

This patch adds the driver for keyboard that's controlled by ChromeOS EC.

Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>

This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>

This patch adds the cros_ec driver that implements the protocol for
communicating with Google's ChromeOS embedded controller.

Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux.
However it has a weird DMA alignment issue:

(1) Tx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: O.K

(2) Rx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: Invalid!!!

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Tom Rini <trini@ti.com>

Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read

Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>

add network support with ksz8851_16mll on at91sam9n12ek board

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>

The device interface is 16 bits wide.
All the available packets are read from the incoming fifo.

Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it>
Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
[voice.shen@atmel.com: address comments from review results]
[voice.shen@atmel.com: clean up for submit]
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>

commit 39695029bc15041c809df3db4ba19bd729c447fa
Author: Charles Coldwell <coldwell@ll.mit.edu>
Date:   Tue Feb 19 08:27:33 2013 -0500

    Changes to support the Xilinx 1000BASE-X phy (GTX/MGT)

Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu>

for use with sparse.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>

Make do_bootz available for other functions like do_bootm is.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>

This patch adds support for the WEMAC, the ethernet controller included
in the Allwinner A10 SoC. It will get used in the upcoming A10 board
support.

From: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>

- remove the builtin 'rootpath' spec (according to U-Boot project
  policy) and require user provided environments to contain these
- rephrase the evaluation of the 'muster_nr' approach which allows to
  quickly switch among several network boot setups (make the setting
  transparent when empty, resulting in default DULG behaviour)
- reduce the ARP timeout for faster network boot

Signed-off-by: Gerhard Sittig <gsi@denx.de>

remove remaining "k6" code names, switch to the official 'ac14xx' name

Signed-off-by: Gerhard Sittig <gsi@denx.de>

- use the default baudrate table for serial communication
- remove hostname/boofile/rootpath defines which were not referenced elsewhere

Signed-off-by: Gerhard Sittig <gsi@denx.de>

fix typos, minor rephrasing, remove obsolete notes and TODO items

Signed-off-by: Gerhard Sittig <gsi@denx.de>

Flag status register polling is required for micron 512Mb flash
devices onwards, for performing erase/program operations.

Like polling for WIP(Write-In-Progress) bit in read status register,
spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control)
bit in flag status register.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the
size for existing boards which has < 16Mbytes SPI flashes.

It's upto user which has provision to use the bank addr code for
flashes which has > 16Mbytes.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>