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  1. Jul 03, 2014
    • Stephen Warren's avatar
      i2c: tegra: use repeated start for reads · 68049a08
      Stephen Warren authored
      
      I2C read transactions are typically implemented as follows:
      
      START(write) address REPEATED_START(read) data... STOP
      
      However, Tegra's I2C driver currently implements reads as follows:
      
      START(write) address STOP START(read) data... STOP
      
      This sequence confuses at least the AS3722 PMIC on the Jetson TK1 board,
      leading to corrupted read data in some cases. Fix the driver to chain
      the transactions together using repeated starts to solve this.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      Reviewed-by: default avatarYen Lin <yelin@nvidia.com>
      68049a08
  2. Jul 02, 2014
    • Tom Rini's avatar
      fe8b3212
    • Tom Rini's avatar
      Prepare v2014.07-rc4 · a176ff07
      Tom Rini authored
      
      Signed-off-by: default avatarTom Rini <trini@ti.com>
      a176ff07
    • Stephen Warren's avatar
      usb: ci_udc: use var name ep/ci_ep consistently · dcb89b5a
      Stephen Warren authored
      
      Almost all of ci_udc.c uses variable name "ep" for a struct usb_ep and
      "ci_ep" for a struct ci_ep. This is nice and consistent, and helps people
      know what type a variable is without searching for the declaration.
      handle_ep_complete() doesn't do this, so fix it to be consistent.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      dcb89b5a
    • Stephen Warren's avatar
      USB: gadget: atmel: zero out allocated requests · 369d3c43
      Stephen Warren authored
      
      A UDC's alloc_request method should zero out the newly allocated request.
      Ensure the Atmel driver does so. This issue was found by code inspection,
      following the investigation of an intermittent issue with ci_udc, which
      was tracked down to failing to zero out allocated requests following some
      of my changes. All other UDC drivers already zero out requests in one
      way or another.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      369d3c43
    • Stephen Warren's avatar
      usb: ci_udc: don't memalign() struct ci_req allocations · 639e9903
      Stephen Warren authored
      
      struct ci_req is a purely software structure, and needs no specific
      memory alignment. Hence, allocate it with calloc() rather than
      memalign(). The use of memalign() was left-over from when struct ci_req
      was going to hold the aligned bounce buffer, but this is now dynamically
      allocated.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      639e9903
    • Stephen Warren's avatar
      usb: ci_udc: remove controller.items array · 6ac15fda
      Stephen Warren authored
      
      There's no need to store an array of QTD pointers in the controller.
      Since the calculation is so simple, just have ci_get_qtd() perform it
      at run-time, rather than pre-calculating everything.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      6ac15fda
    • Stephen Warren's avatar
      usb: ci_udc: fix items array size/stride calculation · 7e541887
      Stephen Warren authored
      
      2 QTDs are allocated for each EP. The current allocation scheme aligns
      the first QTD in each pair, but simply adds the struct size to calculate
      the second QTD's address. This will result in a non-cache-aligned
      addresss IF the system's ARCH_DMA_MINALIGN is not 32 bytes (i.e. the
      size of struct ept_queue_item).
      
      Similarly, the original ilist_ent_sz calculation aligned the value to
      ARCH_DMA_MINALIGN but didn't take the USB HW's 32-byte alignment
      requirement into account. This doesn't cause a practical issue unless
      ARCH_DMA_MINALIGN < 32 (which I suspect is quite unlikely), but we may
      as well fix the code to be explicit, so it's obviously completely
      correct.
      
      The new value of ILIST_ENT_SZ takes all alignment requirements into
      account, so we can simplify ci_{flush,invalidate}_qtd() by simply using
      that macro rather than calling roundup().
      
      Similarly, the calculation of controller.items[i] can be simplified,
      since each QTD is evenly spaced at its individual alignment requirement,
      rather than each pair being aligned, and entries within the pair being
      spaced apart only by structure size.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      7e541887
    • Stephen Warren's avatar
      usb: ci_udc: lift ilist size calculations to global scope · 06b38fcb
      Stephen Warren authored
      
      This will allow functions other than ci_udc_probe() to make use of the
      constants in a future change.
      
      This in turn requires converting the const int variables to #defines,
      since the initialization of one global const int can't depend on the
      value of another const int; the compiler thinks it's non-constant if
      that dependency exists.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      06b38fcb
    • Stephen Warren's avatar
      usb: ci_udc: don't assume QTDs are adjacent when transmitting ZLPs · 8d7c39d3
      Stephen Warren authored
      
      Fix ci_ep_submit_next_request()'s ZLP transmission code to explicitly
      call ci_get_qtd() to find the address of the other QTD to use. This
      will allow us to correctly align each QTD individually in the future,
      which may involve leaving a gap between the QTDs.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      8d7c39d3
    • Stephen Warren's avatar
      usb: ci_udc: fix ci_flush_{qh,qtd} calls in ci_udc_probe() · d7beeb93
      Stephen Warren authored
      
      ci_udc_probe() initializes a pair of QHs and QTDs for each EP. After
      each pair has been initialized, the pair is cache-flushed. The
      conversion from QH/QTD index [0..2*NUM_END_POINTS) to EP index
      [0..NUM_ENDPOINTS] is incorrect; it simply subtracts 1 (which yields
      the QH/QTD index of the first entry in the pair) rather than dividing
      by two (which scales the range). Fix this.
      
      On my system, this avoids cache debug prints due to requests to flush
      unaligned ranges. This is caused because the flush calls happen before
      the items[] array entries are initialized for all but EP0.
      
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      d7beeb93
  3. Jul 01, 2014
  4. Jun 30, 2014
  5. Jun 26, 2014
  6. Jun 25, 2014
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  8. Jun 23, 2014
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