- Jul 10, 2014
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Eric Nelson authored
The pad settings for DISP0_DATA02 and DISP0_DAT10 were not set in the same way as DISP0_DAT00-23, causing much flicker in parallel RGB displays on Dual-Lite and Solo processors. These settings now match the i.MX6 Dual and Quad core versions. Note that this fixes a regression in commit b47abc36 and that this is the second time we've had a regression on these two pads (See commit e654ddf7). Signed-off-by:
Eric Nelson <eric.nelson@boundarydevices.com> Acked-by:
Otavio Salvador <otavio@ossystems.com.br>
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- Jul 09, 2014
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Fabio Estevam authored
Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces set_ldo_voltage() function that can be used to set the voltages of any of the three LDO regulators controlled by the PMU_REG_CORE register. Prior to this commit there was a single set_vddsoc() which only configured the VDDSOC regulator. Update the comments to align with the new set_ldo_voltage() implementation. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Andre Renaud authored
DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do the shift after the multiply to avoid rounding errors Signed-off-by:
Andre Renaud <andre@bluewatersys.com>
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Lothar Rubusch authored
Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Lothar Rubusch <lothar@denx.de> Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Marek Vasut authored
Adjust the mtdparts settings to allow for alternative boot images and for using UBI. Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
- "env ask", "env grep" and "setexpr" are needed for commissioning - add support for ext4 file systems - adjust default environment to use ext4 commands - add write support for (V)FAT and EXT4 - add bitmap and splashscreen support - print timestamp information for images Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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Lothar Rubusch authored
Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Lothar Rubusch <lothar@denx.de>
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Marek Vasut authored
Adjust the mtdparts to also consider factory-programmed config block. Signed-off-by:
Marek Vasut <marex@denx.de>
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Marek Vasut authored
- "env ask", "env grep" and "setexpr" are needed for commissioning - add support for ext4 file systems - adjust default environment to use ext4 commands - add write support for (V)FAT and EXT4 - add bitmap and splashscreen support - print timestamp information for images Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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- Jun 26, 2014
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Fabio Estevam authored
With CONFIG_SYS_GENERIC_BOARD the board hangs after issuing a 'save' command. Remove CONFIG_SYS_GENERIC_BOARD until this issue can be fixed properly. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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- Jun 25, 2014
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Stefano Babic authored
commit 67a04ab3 fix the build for MX25. The same error happens for VF610 SOC. Signed-off-by:
Stefano Babic <sbabic@denx.de>
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- Jun 17, 2014
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Stefano Babic authored
According to: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0 ENGR00287268 mx6: fix the secure boot issue on the new tapout chip commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b newer i.MX6 silicon revisions have an updated ROM and HAB API table. Please see also: i.MX Applications Processors Documentation Engineering Bulletins EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison With this change the secure boot status is correctly displayed Signed-off-by:
Stefano Babic <sbabic@denx.de>
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Fabio Estevam authored
Explain the necessary steps in order to boot from SPI NOR. Based on a earlier submission from Mårten Wikman. Signed-off-by:
Mårten Wikman <marten.wikman@novia.fi> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Introduce 'mx28evk_spi' target which will store the environment variables into SPI NOR, which is useful when booting from SPI NOR. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
When building a target with CONFIG_ENV_IS_IN_SPI_FLASH the following warning is seen: include/configs/mx28evk.h:73:0: warning: "CONFIG_ENV_SIZE" redefined [enabled by default] Protect the definition of CONFIG_ENV_SIZE to avoid the warning. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
The name of the dtb file used in the kernel is 'imx6dl-riotboard.dtb', so fix it accordingly. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Tested-by:
Iain Paton <ipaton0@gmail.com>
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Fabio Estevam authored
mars and riot boards use UART2 as console, so CONFIG_CONSOLE_DEV should point to 'ttymxc1' instead. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Tested-by:
Iain Paton <ipaton0@gmail.com>
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Shawn Guo authored
Commit e9fd66de (ARM: mx6: define CONFIG_ARM_ERRATA_742230) enables errata 742230 for imx6, because it helps remove one reboot issue. However, this errata does not really apply on imx6, because Cortex-A9 on imx6 is r2p10 while the errata only applies to revisions r1p0..r2p2. At a later time, commit f71cbfe3 (ARM: Add workaround for Cortex-A9 errata 794072) adds support of errata 794072, which applies to all Cortex-A9 revisions. As the workaround for both errata are exactly same, it makes a lot more sense to select 794072 instead of 742230 for imx6. Since we already enable 794072 for imx6, it's time to drop errata 742230 to avoid confusion. Signed-off-by:
Shawn Guo <shawn.guo@freescale.com> Acked-by:
Nitin Garg <nitin.garg@freescale.com>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marex@denx.de>
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Fabio Estevam authored
mx6 reference manual incorrectly states that the DEVICE_TYPE field of IOMUXC_GPR12 register should be configured as '0010' for setting the PCI controller in RC mode. The correct value should be '0100' instead. This also aligns with the same value used in the mx6 pci kernel driver. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Marek Vasut <marex@denx.de> Acked-by:
Stefano Babic <sbabic@denx.de>
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- Jun 06, 2014
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Stefano Babic authored
THe mx25 arch does not have a sys_proto.h file. Instead of creating a dummy file, the file is not included for this SOC. Signed-off-by:
Stefano Babic <sbabic@denx.de>
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Fabio Estevam authored
Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Tim Harvey authored
The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return instead of configuring the SATA clock and GPR13 registers. Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Tim Harvey authored
The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return failure instead of attempting a memory access that results in a data abort and reset. Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Tim Harvey authored
Switch to an SPL image. The SPL for Ventana does the following: - setup i2c and read the factory programmed EEPROM to obtain DRAM config and model for board-specific calibration data - configure DRAM per CPU/size/layout/devices/calibration - load u-boot.img from NAND and jump to it This allows for a single SPL+u-boot.img to replace the previous multiple boa configurations. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Tim Harvey authored
use the new iomux function and a macros to create a multi-dimensional array of iomux values without duplicating the defintions. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Tim Harvey authored
Split the read_eeprom function out so that it can be shared (ie with SPL) Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Tim Harvey authored
Allow imx_iomux_v3_setup_multiple_pads to take a multi-cpu pad_list and add macros for declaring the pad_list that take into account the SoC types supported using CONFIG_MX6QDL (supports both the MX6Q and MX6DL iomux). Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Tim Harvey authored
- add function for configuring iomux based on board-specific regs - add function for configuring mmdc based on board-specific and chip-specific data Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Tim Harvey authored
Add memory-mapped structures for MMDC iomux and configuration. Note that whi the MMDC configuration registers are common between the IMX6DQ (IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux registers differ. This requires two sets of structures. Add structures to describe DDR3 device information, system information (memory layout, etc), and MMDC calibration registers that can be used to configure the MMDC dynamically. We define these structures for SPL builds instead of including mx6q-ddr.h an mx6dl-ddr.h which use the same namespace and are only useful for imximage cf files. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Acked-by:
Nikita Kiryanov <nikita@compulab.co.il>
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Tim Harvey authored
Add comment block for the imx_ddr_size function and remove the extra unused fields from struct esd_mmdc_regs which are also not common between IMX53 and IMX6. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Acked-by:
Stefano Babic <sbabic@denx.de> Acked-by:
Nikita Kiryanov <nikita@compulab.co.il>
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Tim Harvey authored
Add a common spl.c file to support boot device functions needed for SPL such as detecting the boot device. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Acked-by:
Nikita Kiryanov <nikita@compulab.co.il>
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Tim Harvey authored
Add a common header which can hopefully be shared amon imx6 SPL users Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Acked-by:
Stefano Babic <sbabic@denx.de> Acked-by:
Nikita Kiryanov <nikita@compulab.co.il>
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Tim Harvey authored
This utilizes existing mxs_nand support layer to provide a method to load an image off nand for SPL. The flash device will be detected in order to support multiple flash devices instead of having layout hard coded at build time. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Masahiro Yamada authored
arch/arm/include/asm/spl.h requires all SoCs to have arch/arm/include/asm/arch-*/spl.h. But many of them just define BOOT_DEVICE_* macros. Those macros are used in the "switch (boot_device) { ... }" statement in common/spl/spl.c. So they should not be archtecture specific, but be described as a simpile enumeration. This commit merges most of arch/arm/include/asm/arch-*/spl.h into arch/arm/include/asm/spl.h. With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h will be merged, while I am not sure about OMAP and Exynos. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> CC: Stefano Babic <sbabic@denx.de> CC: Minkyu Kang <mk7.kang@samsung.com> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by:
Andreas Bießmann <andreas.devel@googlemail.com> Acked-by:
Michal Simek <monstr@monstr.eu> Acked-by:
Stefano Babic <sbabic@denx.de> Acked-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Tim Harvey <tharvey@gateworks.com> Tested-by: Bo Shen <voice.shen@atmel.com> [on sama5d3xek board for at91 part] Acked-by:
Stephen Warren <swarren@nvidia.com> Tested-by: Stefano Babic <sbabic@denx.de> [applying Tim's i.MX6 patches] Acked-by:
Tom Rini <trini@ti.com>
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- May 28, 2014
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Eric Nelson authored
Bit 7 of UCR3 is described in the i.MX3x/i.MX5x/i.MX6x reference manuals as follows: Autobaud Detection Not Improved-. Disables new features of autobaud detection (See Baud Rate Automatic Detection Protocol, for more details). 0 Autobaud detection new features selected 1 Keep old autobaud detection mechanism On at least i.MX6DQ, i.MX6DLS and i.MX53, the "new features" occasionally cause the receiver to get out of sync and continuously produce received characters of '\xff'. This patch disables the "new feature" on all boards, since there's no support for auto-baud in U-Boot on any of them. More details are available in this post on i.MX Community: https://community.freescale.com/message/403254 Signed-off-by:
Eric Nelson <eric.nelson@boundarydevices.com> Tested-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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Fabio Estevam authored
mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus. Add support for it Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Tested by booting a mainline kernel via TFTP. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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- May 25, 2014
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Ian Campbell authored
The correct value for this setting can vary across SoCs and boards, so make it configurable. Also reduce the default value to 8, which is the same default as used in the Linux driver. Signed-off-by:
Ian Campbell <ijc@hellion.org.uk> Cc: Alexey Brodkin <abrodkin@synopsys.com>
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Ian Campbell authored
On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote: > The {r,t}xbuffs fields also need to be aligned. Previously this was done > implicitly because they immediately followed the descriptor tables. Make this > explicit and also move to the head of the struct. Looks like I managed to not actually commit the move of the field to the head of the struct! v3.1 follows.... Ian. 8<------------ >From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Thu, 1 May 2014 19:45:15 +0100 Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more efficiently. The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could be 256 or even larger. That means there is a potentially huge hole in the struct before those fields, so move them to the front where they are better packed. Moving them to the front also helps ensure that so long as dw_eth_dev is properly aligned (which it is since "net/designware: ensure device private data is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids having to worry too much about compiler specifics. The {r,t}xbuffs fields also need to be aligned. Previously this was done implicitly because they immediately followed the descriptor tables. Make this explicit and also move to the head of the struct. Signed-off-by:
Ian Campbell <ijc@hellion.org.uk> Cc: Alexey Brodkin <abrodkin@synopsys.com> Tested-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com>
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