- Jul 12, 2013
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Albert ARIBAUD authored
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Otavio Salvador authored
OpenEmbedded has change partitioning layout of generated image so it does not raise warnings during the boot regarding unkown partition being used for U-Boot. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Acked-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Otavio Salvador authored
OpenEmbedded has change partitioning layout of generated image so it does not raise warnings during the boot regarding unkown partition being used for U-Boot. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Acked-by:
Stefano Babic <sbabic@denx.de>
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Otavio Salvador authored
OpenEmbedded has change partitioning layout of generated image so it does not raise warnings during the boot regarding unkown partition being used for U-Boot. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Acked-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Otavio Salvador authored
OpenEmbedded has change partitioning layout of generated image so it does not raise warnings during the boot regarding unkown partition being used for U-Boot. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Acked-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Otavio Salvador authored
OpenEmbedded has change partitioning layout of generated image so it does not raise warnings during the boot regarding unkown partition being used for U-Boot. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Acked-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Otavio Salvador authored
OpenEmbedded has change partitioning layout of generated image so it does not raise warnings during the boot regarding unkown partition being used for U-Boot. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Acked-by:
Jason Liu <r64343@freescale.com>
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Marek Vasut authored
The MX28 multi-layer AHB bus can be too slow and trigger the FEC DMA too early, before all the data hit the DRAM. This patch ensures the data are written in the RAM before the DMA starts. Please see the comment in the patch for full details. This patch was produced with an amazing help from Albert Aribaud, who pointed out it can possibly be such a bus synchronisation issue. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by:
Fabio Estevam <fabio.estevam@freescale.com> Tested-by:
Alexandre Pereira da Silva <aletes.xgr@gmail.com>
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Marek Vasut authored
Remove incorrectly called and duplicate flush_dcache_range() call from fec_mxc driver. The call is not needed, since the caches are already flushed in fec_tbd_init(), moreover the second argument should be the ending address, not size. Signed-off-by:
Marek Vasut <marex@denx.de> Reported-by:
Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
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Marek Vasut authored
this is usefull when writing an UBI image which contains and UBIFS volume (check README.nand and UBI FAQ for more details) Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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- Jul 11, 2013
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Stephen Warren authored
Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Jim Lin authored
Add USB EHCI, storage and network support. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by:
Jim Lin <jilin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Jim Lin authored
Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by:
Jim Lin <jilin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Jim Lin authored
Add DT node for USB EHCI function. Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards. Signed-off-by:
Jim Lin <jilin@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com> Tested-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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- Jul 10, 2013
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Albert ARIBAUD authored
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Amar authored
This patch resolves the below mentioned compilation error of i2c driver for non-FDT case Compilation error: s3c24x0_i2c.c: In function 'board_i2c_init': s3c24x0_i2c.c:544:18: error: 'CONFIG_MAX_I2C_NUM' undeclared (first use in this function) s3c24x0_i2c.c:544:18: note: each undeclared identifier is reported only once for each function it appears in s3c24x0_i2c.c:545:3: warning: implicit declaration of function Signed-off-by:
Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by:
Amar <amarendra.xt@samsung.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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- Jul 09, 2013
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Minkyu Kang authored
There are differnce with clock calcuation by cpu variations. This patch will fix it according to user manual. Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com> Signed-off-by:
Rajeshwari Shinde <rajeshwari.s@samsung.com>
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- Jul 05, 2013
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Łukasz Majewski authored
Add support for disabling battery charging with ctrl+C keyboard combination pressed. Moreover the battery update is done more frequently. Signed-off-by:
Lukasz Majewski <l.majewski@samsung.com> Cc: Tom Rini <trini@ti.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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Łukasz Majewski authored
Commit: dfu: make data buffer size configurable SHA1: 89a72b2e0e141042c9109185e02d39b2107ffc62 replaced statically allocated buffers with one allocated with memalign. Malloc pool size of 1MiB was too small, since we needed bigger buffer to transfer for example uImage. Signed-off-by:
Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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Rajeshwari Shinde authored
This patch performs the following: 1) Convert the assembly code for memory and clock initialization to C code. 2) Move the memory and clock init codes from board/samsung to arch/arm 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted the common lowlevel_init from assembly to C-code 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5. 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already done in _main. 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250. TEST: Tested SD-MMC boot on SMDK5250 and Origen. Tested USB and SPI boot on SMDK5250 Compile tested for SMDKV310. Signed-off-by:
Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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Rajeshwari Shinde authored
This patch configures the gpio values for UART on Origen and SMDKV310 using pinmux Signed-off-by:
Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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Rajeshwari Shinde authored
smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused. It is renamed to exynos-uboot-spl.lds Signed-off-by:
Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by:
Simon Glass <sjg@chromium.org> Tested-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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Rajeshwari Shinde authored
This patch adds APIs to get power reset status and exit the wakeup condition for both exynos5 and exynos4 Signed-off-by:
Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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- Jul 02, 2013
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Axel Lin authored
The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs. These SoCs have different gpio count but currently omap_gpio driver uses hard coded 192 which is wrong. This patch fixes this issue by: 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h. 2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5. Thanks for Lubomir Popov to provide valuable comments to fix this issue. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Tested-by:
Lubomir Popov <lpopov@mm-sol.com> Acked-by:
Heiko Schocher <hs@denx.de>
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Lokesh Vutla authored
During SDRAM_AUTO_DETECTION MA is not configured. For Soc's > OMAP4460 MA is present. So populating MA for the same. Tested on OMAP4430 PANDA, OMAP4460 PANDA. Reported-by:
Dan Murphy <dmurphy@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Ilya Ledvich authored
Fix the wrong mapping between the DDR I/O control registers on AM33XX SoCs and the software representation in the SPL code. The most recent public TRM defines the following DDR I/O control registers offsets: * ddr_cmd0_ioctrl : offset 0x44E11404 * ddr_cmd1_ioctrl : offset 0x44E11408 * ddr_cmd2_ioctrl : offset 0x44E1140C * ddr_data0_ioctrl: offset 0x44E11440 * ddr_data1_ioctrl: offset 0x44E11444 While the struct ddr_cmdtctrl has also some reserved bits in the beginning. The struct is mapped to the address 0x44E11404. As a result "cm0ioctl" points to the ddr_cmd1_ioctrl register, "cm1ioctl" to the ddr_cmd2_ioctrl and etc. Registers ddr_cmd0_ioctrl and ddr_data0_ioctrl are never configured because of this mapping mismatch. Signed-off-by:
Ilya Ledvich <ilya@compulab.co.il> Reviewed-by:
Peter Korsgaard <jacmet@sunsite.dk>
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Michael Trimarchi authored
This patch fix the omap access to the transceiver configuration registers using the ulpi bus. As reported by the documentation the bit31 is used only to check if the transaction is done or still running and the reading and writing operation have different offset and have different values. What we need to do at the end of a transaction is leave the bus in done state. Anyway an error using the ulpi omap register is not recoverable so any error give out the usage of this interface. Tested on a custom OMAP5430 board with a TUSB1210 ULPI PHY on USBB1. Signed-off-by:
Michael Trimarchi <michael@amarulasolutions.com> Acked-by:
Igor Grinberg <grinberg@compulab.co.il> Tested-by:
Lubomir Popov <lpopov@mm-sol.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
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- Jun 28, 2013
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Albert ARIBAUD authored
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Otavio Salvador authored
We've been dropping SoC name from U-Boot prompt as it increase complexity for automatic testing and makes line longer for no good reason. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Tested-by:
Andy Voltz <andy.voltz@timesys.com>
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Otavio Salvador authored
This adds a default environment which should be able to support both 3.0.15 from Timesys and upcoming 3.11. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Tested-by:
Andy Voltz <andy.voltz@timesys.com>
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Fabio Estevam authored
Currently we have the following on boot: CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SD/MMC #0, 3V3 DRAM: 128 MiB MMC: MXS MMC: 0 Video: MXSFB: 'videomode' variable not set!In: serial Break the line of the warning message in order to have a better reading format. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Otavio Salvador <otavio@ossystems.com.br>
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Rajeshwari Shinde authored
enum boot_mode is defined twice once in spl.h and also in spl_boot.c, hence removing the same from spl_boot.c and including the header file. Signed-off-by:
Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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- Jun 26, 2013
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Fabio Estevam authored
Board specific READMEs should be located inside the respective board directory. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Board specific READMEs should be located inside the respective board directory. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Create a README.mxs file that contains instructions on how to use U-boot for both MX23 and MX28. As boot from NAND has only been tested on mx28, make it clear that it only applies to MX28. While at it, do some small cleanups for the sake of consistency: - Use "MX28" instead of "i.MX28" - Use "section" instead of "chapter" when referring to specific parts of the reference manual chapters. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Re-structure the sentence a bit so that it can clearer. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
MX28 can boot from SSP0 or SSP1, so it is better not to hardcode the SSP port in the instructions. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
In order to improve readability keep the text within 80 columns. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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