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Commit 22bca422 authored by Sebastian Reichel's avatar Sebastian Reichel Committed by Sebastian Reichel
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[HACK] arm64: dts: freescale: imx95-19x19-verdin-evk: add graphics support


Add graphics support. This uses the upstream Mali GPU binding (incl.
some work-in-progress patches from Marek for the reset controller) and
the downstream bindings and drivers for the display controller.

Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.com>
parent 41ad1a33
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...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
#include <dt-bindings/usb/pd.h> #include <dt-bindings/usb/pd.h>
#include "imx95.dtsi" #include "imx95.dtsi"
#include "imx95-19x19-verdin-graphics.dtsi"
#define FALLING_EDGE 1 #define FALLING_EDGE 1
#define RISING_EDGE 2 #define RISING_EDGE 2
......
/ {
hdmi-connector {
compatible = "hdmi-connector";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm_3_dsi_hpd_gpio>;
ddc-i2c-bus = <&lpi2c2>;
/* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) GPIO_IO12 */
hpd-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
label = "hdmi";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&lt8912b_out>;
};
};
};
};
&displaymix_irqsteer {
status = "okay";
};
&display_pixel_link {
status = "okay";
};
&dpu {
assigned-clocks = <&scmi_clk IMX95_CLK_DISP1PIX>,
<&scmi_clk IMX95_CLK_VIDEOPLL1_VCO>,
<&scmi_clk IMX95_CLK_VIDEOPLL1>;
assigned-clock-parents = <&scmi_clk IMX95_CLK_VIDEOPLL1>;
assigned-clock-rates = <0>, <4008000000>, <445333334>;
status = "okay";
};
&gpu_blk_ctrl {
status = "okay";
};
&gpu {
status = "okay";
};
&lpi2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpi2c2>;
clock-frequency = <100000>;
status = "okay";
};
&lpi2c7 {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <400000>;
status = "okay";
hdmi@48 {
compatible = "lontium,lt8912b";
reg = <0x48>;
pinctrl-names = "default";
reset-gpios = <&i2c7_pcal6524 9 GPIO_ACTIVE_LOW>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lt8912b_to_dsi: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&dsi_to_lt8912b>;
};
};
port@1 {
reg = <1>;
lt8912b_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
};
};
};
&mipi_dsi {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_to_lt8912b: endpoint {
remote-endpoint = <&lt8912b_to_dsi>;
};
};
};
};
&pixel_interleaver {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@0 {
reg = <0>;
status = "okay";
};
};
&scmi_iomuxc {
pinctrl_lpi2c2: lpi2c2grp {
fsl,pins = <
IMX95_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL 0x40000b9e
IMX95_PAD_I2C2_SDA__AONMIX_TOP_LPI2C2_SDA 0x40000b9e
>;
};
pinctrl_pwm_3_dsi_hpd_gpio: dsihpdgrp {
fsl,pins = <
IMX95_PAD_GPIO_IO12__GPIO2_IO_BIT12 0x31e
>;
};
};
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