- Jun 12, 2023
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Film grain feature add "old style" grain noise on decoded streams. Grain noise is applied after decoding by the postprocessor. The level of grain is based on gaussian sequence. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Implement AV1 stateless decoder for rockchip VPU981. It decode 8 and 10 bits AV1 bitstreams. AV1 scaling feature is done by the postprocessor. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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AV1 hardware decoder needs entropy parameters to decode frames. They are computed from various arrays defined in AV1 section "9.4. Default CDF tables". Add helpers functions to init, store and get these parameters. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Compute the additional space required to store motion vectors at the end of the frames buffers. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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- Aug 31, 2022
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Ezequiel Garcia authored
The Hantro mainline driver has been used in production since several years and was only kept as a staging driver due the stateless CODEC controls. Now that all the stateless CODEC controls have been moved out of staging, graduate the driver as well. Signed-off-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Jul 27, 2022
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Ezequiel Garcia authored
Currently, the driver tries to validat the HEVC SPS against the CAPTURE queue format (i.e. the decoded format). This is not correct, because typically the SPS control is set before the CAPTURE queue is negotiated. Fixes: 135ad96c ("media: hantro: Be more accurate on pixel formats step_width constraints") Signed-off-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Jul 15, 2022
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Benjamin Gaignard authored
The HEVC specification describes the following: "PicOrderCntVal is derived as follows: PicOrderCntVal = PicOrderCntMsb + slice_pic_order_cnt_lsb The value of PicOrderCntVal shall be in the range of −2^31 to 2^31 − 1, inclusive." To match with these definitions change __u16 pic_order_cnt[2] into __s32 pic_order_cnt_val. Change v4l2_ctrl_hevc_slice_params->slice_pic_order_cnt to __s32 too. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Tested-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Jul 08, 2022
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Nicolas Frattaroli authored
The RK3566 and RK3568 SoCs come with a small Hantro instance which is solely dedicated to encoding. This patch adds the necessary structs to the Hantro driver to allow the JPEG encoder of it to function. Through some sleuthing through the vendor's MPP source code and after closer inspection of the TRM, it was determined that the hardware likely supports VP8 and H.264 as well. Tested with the following GStreamer command: gst-launch-1.0 videotestsrc ! v4l2jpegenc ! matroskamux ! \ filesink location=foo.mkv Signed-off-by:
Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Jun 20, 2022
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Benjamin Gaignard authored
On Hantro G2 decoder on IMX8MQ strides requirements aren't the same for NV12_4L4 and NV12 pixel formats. The first one use a 4 bytes padding while the last one needs 16 bytes. To be sure to provide the correct stride in all cases we need: - to relax the constraints on codec formats so set step_width to 4 - use capture queue format and not the output queue format when applying the pixel format constraints. - put the correct step_width constraints on each pixel format. Move HEVC SPS validation in hantro_hevc.c to be able to perform it when setting sps control and when starting to decode the bitstream. Add a new test in HEVC SPS validation function to check if resolution is still matching the hardware constraints. With this SAODBLK_A_MainConcept_4 and SAODBLK_B_MainConcept_4 conformance tests files are correctly decoded with both NV12 and NV12_4L4 pixel formats. These two files have a resolution of 1016x760. Add defines for the various used resolutions. For other variants than Hantro G2 on IMX8M keep the same step_width to avoid regressions. Fluster HEVC test score is now 128/147 vs 126/147 with the both pixel formats as decoder output. Fluster VP9 test score stay at 147/303. [hverkuil: fix trivial checkpatch warnings] Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- May 17, 2022
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Nicolas Dufresne authored
This adds the required code to support field decoding. While most of the code is derived from Rockchip and VSI reference code, the reduction of the reference list to 16 entries was found by trial and errors. The list consists of all the references with the opposite field parity. The strategy is to deduplicate the reference picture that points to the same storage (same index). The choice of opposite parity has been made to keep the other field of the current field pair in the list. This method may not be robust if a field was lost. [hverkuil: fix typos in the comment before deduplicate_reflist()] [hverkuil: document new cur_poc field] Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Signed-off-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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Nicolas Dufresne authored
This is to accommodate support for field decoding, which splits the top and the bottom references into the reference list. Signed-off-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Reviewed-by:
Sebastian Fricke <sebastian.fricke@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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Nicolas Dufresne authored
In preparation for adding field decoding support, convert the byte arrays for reflist into array of struct v4l2_h264_reference. That struct will allow us to mark which field of the reference picture is being referenced. [hverkuil: top_field_order_cnt -> pic_order_count] Signed-off-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Tested-by:
Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- May 13, 2022
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Benjamin Gaignard authored
PoC shall be int the range of -2^31 to 2^31 -1 (HEVC spec section 8.3.1 Decoding process for picture order count). The current way to know if an entry in reference picture array is free is to test if PoC = UNUSED_REF. Since UNUSED_REF is defined as '-1' that could lead to decode issue if one PoC also equal '-1'. PoC with value = '-1' exists in conformance test SLIST_B_Sony_9. Change the way unused entries are managed in reference pictures array to avoid using PoC to detect then. This patch doesn't change fluster HEVC score. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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Benjamin Gaignard authored
Hantro decoder doesn't take care of the requested and aligned size of the capture buffer. Stop using the bitstream width/height and use capture frame size stored in the context to get the correct values. hantro_hevc_chroma_offset() and hantro_hevc_motion_vectors_offset() are only used in hantro_g2_hevc_dec.c so take the opportunity to move them here. fluster HEVC score goes up from 77 to 85 successful tests (over 147) with this patch. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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Benjamin Gaignard authored
Hantro G2 post processor is able to down scale decoded frames by a factor of 2, 4 or 8. Add enum_framesizes() ops to postproc_ops structure to enumerate the possible output sizes for a given input resolution. For G2 post-processor use fsize->index (from 0 to 3) as power of 2 divisor. As described in v4l2 documentation return -EINVAL when scaling down isn't possible. fluster scores: 77/147 for HEVC 143/303 for VP9 Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Apr 24, 2022
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Piotr Oniszczuk authored
RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8 video formats. This patch adds support for RK356x family in existing Hantro video decoder kernel driver. Tested on [1] with FFmpeg v4l2_request code taken from [2] with MPEG2, H.642 and VP8 samples with results [3]. [1] https://github.com/warpme/minimyth2 [2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch [3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt Signed-off-by:
Piotr Oniszczuk <piotr.oniszczuk@gmail.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Mar 07, 2022
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Adam Ford authored
The i.MX8MM has a Hantro G1 video decoder similar to the imx8mq but lacks the post-processor present in the imx8mq. Add support in the driver for it with the post-processing removed. Signed-off-by:
Adam Ford <aford173@gmail.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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Adam Ford authored
The VPU in the i.MX8MQ is really the combination of Hantro G1 and Hantro G2. With the updated vpu-blk-ctrl, the power domains system can enable and disable them separately as well as pull them out of reset. This simplifies the code and lets them run independently while still retaining backwards compatibility with older device trees for those using G1. Signed-off-by:
Adam Ford <aford173@gmail.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Jan 28, 2022
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Chen-Yu Tsai authored
Now that the JPEG header length is aligned with bus access boundaries, the JPEG encoder can output to the capture buffers directly without going through a bounce buffer. Do just that, and get rid of all the bounce buffer related code. Signed-off-by:
Chen-Yu Tsai <wenst@chromium.org> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab@kernel.org>
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- Dec 16, 2021
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Jernej Skrabec authored
Allwinner H6 has a Hantro G2 core used for VP9 decoding. It's not clear at this time if HEVC is also supported or not. Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by:
Andrzej Pietrasiewicz <andrzej.p@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Jernej Skrabec authored
It turns out that imx8m_vpu_g2_irq() doesn't depend on any platform specifics and can be used with other G2 platform drivers too. Move it to common code. Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by:
Andrzej Pietrasiewicz <andrzej.p@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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- Dec 14, 2021
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Benjamin Gaignard authored
G2/HEVC is broken because driver capture queue pixelformat ioctl G_FMT returns VT12 while G2/HEVC always generate NV12 frames: video1: VIDIOC_S_FMT: type=vid-out-mplane, width=2560, height=1600, format=S265 little-endian (0x35363253), field=none, colorspace=0, num_planes=1, flags=0x0, ycbcr_enc=0, quantization=0, xfer_func=0 plane 0: bytesperline=0 sizeimage=6144000 video1: VIDIOC_S_EXT_CTRLS: which=0x0, count=1, error_idx=0, request_fd=0, name=HEVC Sequence Parameter Set, id/size=0x990cf0/32 video1: VIDIOC_G_FMT: type=vid-cap-mplane, width=2560, height=1600, format=VT12 little-endian (0x32315456), field=none, colorspace=0, num_planes=1, flags=0x0, ycbcr_enc=0, quantization=0, xfer_func=0 plane 0: bytesperline=2560 sizeimage=6144000 video1: VIDIOC_ENUM_FMT: index=0, type=vid-cap-mplane, flags=0x0, pixelformat=NV12 little-endian (0x3231564e), mbus_code=0x0000, description='Y/CbCr 4:2:0' video1: VIDIOC_ENUM_FMT: error -22: index=1, type=vid-cap-mplane, flags=0x0, pixelformat=.... little-endian (0x00000000), mbus_code=0x0000, description='' video1: VIDIOC_G_FMT: type=vid-cap-mplane, width=2560, height=1600, format=VT12 little-endian (0x32315456), field=none, colorspace=0, num_planes=1, flags=0x0, ycbcr_enc=0, quantization=0, xfer_func=0 Use the postprocessor functions introduced by Hantro G2/VP9 codec series to fix the issue and remove duplicated buffer management. This allow Hantro G2/HEVC to produce NV12_4L4 and NV12. Fluster scores are 77/147 for HEVC and 129/303 for VP9 (no regression). Beauty, Jockey and ShakeNDry bitstreams from UVG (http://ultravideo.fi/ ) set have also been tested. Fixes: 53a3e710 ("media: hantro: Simplify postprocessor") Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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- Nov 30, 2021
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Chen-Yu Tsai authored
The JPEG encoder found in the Hantro H1 encoder block only produces a raw entropy-encoded scan. The driver is responsible for building a JPEG compliant bitstream and placing the entropy-encoded scan in it. Right now the driver uses a bounce buffer for the hardware to output the raw scan to. In commit e765dba1 ("hantro: Move hantro_enc_buf_finish to JPEG codec_ops.done"), the code that copies the raw scan from the bounce buffer to the capture buffer was moved, but was only hooked up for the Hantro H1 (then RK3288) variant. The RK3399 variant was broken, producing a JPEG bitstream without the scan, and the capture buffer's .bytesused field unset. Fix this by duplicating the code that is executed when the JPEG encoder finishes encoding a frame. As the encoded length is read back from hardware, and the variants having different register layouts, the code is duplicated rather than shared. Fixes: e765dba1 ("hantro: Move hantro_enc_buf_finish to JPEG codec_ops.done") Signed-off-by:
Chen-Yu Tsai <wenst@chromium.org> Tested-by:
Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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- Nov 22, 2021
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Andrzej Pietrasiewicz authored
The G2 decoder block produces NV12 4x4 tiled format (NV12_4L4). Enable the G2 post-processor block, in order to produce regular NV12. The logic in hantro_postproc.c is leveraged to take care of allocating the extra buffers and configure the post-processor, which is significantly simpler than the one on the G1. Signed-off-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Andrzej Pietrasiewicz <andrzej.p@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Andrzej Pietrasiewicz authored
VeriSilicon Hantro G2 core supports VP9 codec. [hverkuil: add kerneldoc line for HANTRO_MODE_VP9_DEC] Signed-off-by:
Andrzej Pietrasiewicz <andrzej.p@collabora.com> Reviewed-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Andrzej Pietrasiewicz authored
VeriSilicon Hantro G2 core supports other codecs besides hevc. Factor out some common code in preparation for vp9 support. Signed-off-by:
Andrzej Pietrasiewicz <andrzej.p@collabora.com> Reviewed-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Ezequiel Garcia authored
Turns out the post-processor block on the G2 core is substantially different from the one on the G1 core. Introduce hantro_postproc_ops with .enable and .disable methods, which will allow to support the G2 post-processor cleanly. Signed-off-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Andrzej Pietrasiewicz <andrzej.p@collabora.com> Reviewed-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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- Sep 30, 2021
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Benjamin Gaignard authored
If the bitstream embedded scaling lists allow the driver to use them for decode the frames. The scaling lists are expected to be in raster scan order (i.e. not up right diagonal scan order) Allocate the memory needed to store lists. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> [hverkuil: add missing @scaling kernel doc description in hantro_hw.h] Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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- Jul 22, 2021
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Paul Kocialkowski authored
The PX30 SoC includes both the VDPU2 and VEPU2 blocks which are similar to the RK3399 (Hantro G1/H1 with shuffled registers). Signed-off-by:
Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Jonas Karlman authored
Rockchip VDPU2 core is present on RK3328, RK3326/PX30, RK3399 and others. It's similar to Hantro G1, but it's not compatible with it. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Signed-off-by:
Ezequiel Garcia <ezequiel@collabora.com> Tested-by:
Alex Bee <knaerzche@gmail.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Ezequiel Garcia authored
Add a hantro_h264_get_ref_nbr() helper function to get the reference picture numbers. This will be used by the Rockchip VDPU2 H.264 driver. This idea was originally proposed by Jonas Karlman in "[RFC 09/12] media: hantro: Refactor G1 H264 code" posted a while ago. Link: https://lore.kernel.org/linux-media/HE1PR06MB401165F2BA0AD8A634FDFAF2ACBF0@HE1PR06MB4011.eurprd06.prod.outlook.com/ Signed-off-by:
Ezequiel Garcia <ezequiel@collabora.com> Tested-by:
Alex Bee <knaerzche@gmail.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Ezequiel Garcia authored
In order to reuse these bitmaps, move this process to struct hantro_h264_dec_hw_ctx. This will be used by the Rockchip VDPU2 H.264 driver. This idea was originally proposed by Jonas Karlman in "[RFC 08/12] media: hantro: Fix H264 decoding of field encoded content" which was posted a while ago. Link: https://lore.kernel.org/linux-media/HE1PR06MB4011EA39133818A85768B91FACBF0@HE1PR06MB4011.eurprd06.prod.outlook.com/ Signed-off-by:
Ezequiel Garcia <ezequiel@collabora.com> Tested-by:
Alex Bee <knaerzche@gmail.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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- Jun 17, 2021
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Alex Bee authored
RK3036's VPU IP block is the same as RK3288 has, except that it doesn't have an encoder, decoding is supported up to 1920x1088 only and the axi clock can be set to 300 MHz max. Add a new RK3036 variant which reflects these differences. Signed-off-by:
Alex Bee <knaerzche@gmail.com> Reviewed-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Alex Bee authored
RK3066's VPU IP block is the predecessor from what RK3288 has. The hardware differences are: - supports decoding frame sizes up to 1920x1088 only - doesn't have the 'G1_REG_SOFT_RESET' register (requires another .reset callback for hantro_codec_ops, since writing this register will result in non-working IP block) - has one ACLK/HCLK per vdpu/vepu - ACLKs can be clocked up to 300 MHz only - no MMU (no changes required: CMA will be transparently used) Add a new RK3066 variant which reflect this differences. This variant can be used for RK3188 as well. Signed-off-by:
Alex Bee <knaerzche@gmail.com> Reviewed-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Alex Bee authored
Merge the two Rockchip platform drivers into one as it was suggested at [1] and [2]. This will hopefully make it easier to add new variants (which are surely to come for Rockchip). Also rename from "rk3288" to "v(d/e)pu1" and "rk3399" to "v(d/e)pu2" where applicable, as this is the dicition the vendor uses and will also refelect the variants that get added later in this series. Rename from "rk3288" to "rockchip" if applicable to both hardware versions. [1] https://patchwork.kernel.org/project/linux-rockchip/patch/20210107134101.195426-6-paul.kocialkowski@bootlin.com/ [2] https://patchwork.kernel.org/project/linux-rockchip/patch/20210525152225.154302-5-knaerzche@gmail.com/ Signed-off-by:
Alex Bee <knaerzche@gmail.com> Reviewed-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Alex Bee authored
Reorder variants in hantro driver alphanumeric. Signed-off-by:
Alex Bee <knaerzche@gmail.com> Reviewed-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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- Jun 08, 2021
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Benjamin Gaignard authored
Add variant to IMX8M to enable G2/HEVC codec. Define the capabilities for the hardware up to 3840x2160. G2 doesn't have a postprocessor, uses the same clocks and has it own interrupt. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Benjamin Gaignard authored
Implement all the logic to get G2 hardware decoding HEVC frames. It supports up level 5.1 HEVC stream. It doesn't support yet 10 bits formats or the scaling feature. Add HANTRO HEVC dedicated control to skip some bits at the beginning of the slice header. That is very specific to this hardware so can't go into uapi structures. Computing the needed value is complex and requires information from the stream that only the userland knows so let it provide the correct value to the driver. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Co-developed-by:
Adrian Ratiu <adrian.ratiu@collabora.com> Signed-off-by:
Adrian Ratiu <adrian.ratiu@collabora.com> Co-developed-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Benjamin Gaignard authored
Change hantro_codec_ops run prototype from 'void' to 'int'. This allows the driver to cancel the job if an error occurs while configuring the hardware. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by:
Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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- May 23, 2021
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Ezequiel Garcia authored
The MPEG-2 specification refers to the quantisation matrices using the word "quantisation". Make the V4L2 interface more ergonomic by matching the MPEG-2 spec. Signed-off-by:
Ezequiel Garcia <ezequiel@collabora.com> Tested-by:
Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by:
Jernej Skrabec <jernej.skrabec@siol.net> Tested-by:
Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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