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Commit 4cf2aa22 authored by Shunqian Zheng's avatar Shunqian Zheng Committed by Helen Koike
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arm64: dts: rockchip: add isp0 node for rk3399


rk3399 have two ISP, but we havn't test isp1, so just add isp0 at present.

Signed-off-by: default avatarShunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: default avatarJacob Chen <jacob2.chen@rock-chips.com>
[update for upstream]
Signed-off-by: default avatarHelen Koike <helen.koike@collabora.com>

Series-changes: 7
- add phy properties
- add ports
parent d4b5d064
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......@@ -1701,6 +1701,31 @@
status = "disabled";
};
isp0: isp0@ff910000 {
compatible = "rockchip,rk3399-cif-isp";
reg = <0x0 0xff910000 0x0 0x4000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru SCLK_ISP0>,
<&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
<&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
clock-names = "clk_isp",
"aclk_isp", "aclk_isp_wrap",
"hclk_isp", "hclk_isp_wrap";
power-domains = <&power RK3399_PD_ISP0>;
iommus = <&isp0_mmu>;
phys = <&mipi_dphy_rx0>;
phy-names = "dphy";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
};
};
isp0_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
......
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