- Feb 06, 2025
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AngeloGioacchino Del Regno authored
Now that all of the mmsys routing tables have been fixed, migrate all of them to use the MMSYS_ROUTE() macro: this will make sure that future additions to any of the tables for the currently supported SoCs are compile-time sanity checked, greatly reducing room for (way too common) mistakes. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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AngeloGioacchino Del Regno authored
The mmsys driver reads the routing table and writes to the hardware `val & mask`, but multiple entries in the mmsys routing table for the MT8365 SoC are setting a 0x0 mask: this effectively writes .. nothing .. to the hardware. That would never work, and if the display controller was actually working with the mmsys doing no routing at all, that was only because the bootloader was correctly setting the display controller routing registers before booting the kernel, and the mmsys was never reset. Make this table to actually set the routing by adding the correct register masks to it. While at it, also change MOUT val definitions to BIT(x), as the MOUT registers are effectively checking for each bit to enable output to the corresponding HW. Please note that, for this SoC, only the MOUT registers are checking bits (as those can enable multiple outputs), while the others are purely reading a number to select an input. Fixes: bc3fc5c0 ("soc: mediatek: mmsys: add MT8365 support") Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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AngeloGioacchino Del Regno authored
The mmsys routing table for this SoC was effectively missing initialization of the val variable of struct mtk_mmsys_routes: this means that `val` was incorrectly initialized to zero, hence the registers were wrongly initialized. Add the required regval to all of the entries of the routing table for this SoC to fix display controller functionality. Fixes: 060f7875 ("soc: mediatek: mmsys: Add support for MT8167 SoC") Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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- Feb 04, 2025
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AngeloGioacchino Del Regno authored
Add routing paths to support Display Stream Compression on the VDOSYS0 pipelines ending with DSI or DisplayPort (DP_INTF). Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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AngeloGioacchino Del Regno authored
MT8188 uses DPI1 to output to the HDMI controller: add the Start of Frame and End of Frame configuration for the DPI1 IP to the tables to unblock generation and sending of these signals to the GCE. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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- Jan 15, 2025
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AngeloGioacchino Del Regno authored
Change the initialization data in the arrays of structure mtk_mmsys_routes to make use of the MMSYS_ROUTE() macro: this will make sure that each array entry's SEL value fits in its corresponding register mask with a compile time check. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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AngeloGioacchino Del Regno authored
Every MediaTek SoC with multimedia capabilities has an array of structure mtk_mmsys_routes that defines a multimedia connection between hardware components. This connection is activated by writing a (masked) value in each specific register, and the association between from->to path and value to write is expressed as an entry in that array. Failing to set the right path does not give any meaningful error and makes things to simply not work as the data will either not be retrieved from the right input port, or will be written to the wrong output port (or both): since a misconfiguration may effectively still be a possibly correct configuration at the HW level, this may be only giving side effects in terms of simply getting no functionality but, again, no errors. In order to reduce room for mistakes in declarations of the mmsys routes, add a macro that compile-time checks that the provided value does at least fit in the register mask. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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- Jan 14, 2025
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AngeloGioacchino Del Regno authored
The VDO1_MERGE4 hardware (merge5 software component) should be set to enable output to DPI1_SEL by setting BIT(2) but, despite the intention being exactly that, this won't work because the declared register mask is wrong as it is set as GENMASK(1, 0). Register MERGE4_MOUT_EN in VDO1 has four used bits [3, 0] so fix the mask to reflect that. That, in turn, allows the mmsys driver to actually set BIT(2) in this register, fixing the MERGE4 output to DPI1 selection. Fixes: c0349314 ("soc: mediatek: Support MT8188 VDOSYS1 in mtk-mmsys") Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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- Jan 11, 2025
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Krzysztof Kozlowski authored
Commit e9f826b0 ("soc: qcom: pmic_glink: simplify locking with guard()") was on top of a fix [1] which was moving the 'pg = __pmic_glink' assignment into the critical section. Unfortunately the actual fix was not applied and instead rebased version of the next patch got in. The resulting code is in general correct, but now there is a duplicated assignment 'pg = __pmic_glink'. [1] https://lore.kernel.org/all/20240822164815.230167-1-krzysztof.kozlowski@linaro.org/ Fixes: e9f826b0 ("soc: qcom: pmic_glink: simplify locking with guard()") Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250111172326.101779-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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- Jan 10, 2025
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Kartik Rajput authored
Various Nvidia userspace applications and tests access following fuse via Fuse nvmem interface: * odmid * odminfo * boot_security_info * public_key_hash * reserved_odm0 * reserved_odm1 * reserved_odm2 * reserved_odm3 * reserved_odm4 * reserved_odm5 * reserved_odm6 * reserved_odm7 * odm_lock * pk_h1 * pk_h2 * revoke_pk_h0 * revoke_pk_h1 * security_mode * system_fw_field_ratchet0 * system_fw_field_ratchet1 * system_fw_field_ratchet2 * system_fw_field_ratchet3 * optin_enable Update tegra234_fuse_keepouts list to allow reading these fuse from nvmem sysfs interface. Signed-off-by:
Kartik Rajput <kkartik@nvidia.com> Link: https://lore.kernel.org/r/20241127061053.16775-1-kkartik@nvidia.com Signed-off-by:
Thierry Reding <treding@nvidia.com>
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liujing authored
Fix spelling error in tegra234_lookup_slave_timeout(). Signed-off-by:
liujing <liujing@cmss.chinamobile.com> Link: https://lore.kernel.org/r/20241209055148.3749-1-liujing@cmss.chinamobile.com Signed-off-by:
Thierry Reding <treding@nvidia.com>
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- Jan 09, 2025
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Krzysztof Kozlowski authored
Kernel coding style expects all drivers to ignore debugfs errors. Partially because it is purely for debugging, not for important user interfaces. Simplify the code by dropping unnecessary probe failuring and error message on debugfs failures, which also fixes incorrect usage IS_ERR_OR_NULL() and Smatch warning: drivers/soc/tegra/cbb/tegra-cbb.c:80 tegra_cbb_err_debugfs_init() warn: passing zero to 'PTR_ERR' Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250104141958.115911-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Thierry Reding <treding@nvidia.com>
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- Jan 08, 2025
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Luca Weiss authored
The Qualcomm SM7225 is practically identical to SM6350, so add an entry using that data. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20241220-pd-mapper-sm7225-v1-1-68f85a87288d@fairphone.com Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Varadarajan Narayanan authored
The 'broadcast' register space is present only in chipsets that have multiple instances of LLCC IP. Since IPQ5424 has only one instance, both the LLCC and LLCC_BROADCAST points to the same register space. Signed-off-by:
Varadarajan Narayanan <quic_varada@quicinc.com> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241121051935.1055222-3-quic_varada@quicinc.com Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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- Jan 07, 2025
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Krzysztof Kozlowski authored
Driver removal should fully clean up - unmap the memory. Fixes: 0890beb2 ("soc: mediatek: add mt6779 devapc driver") Cc: stable@vger.kernel.org Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250104142012.115974-2-krzysztof.kozlowski@linaro.org Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Krzysztof Kozlowski authored
Error paths of mtk_devapc_probe() should unmap the memory. Reported by Smatch: drivers/soc/mediatek/mtk-devapc.c:292 mtk_devapc_probe() warn: 'ctx->infra_base' from of_iomap() not released on lines: 277,281,286. Fixes: 0890beb2 ("soc: mediatek: add mt6779 devapc driver") Cc: stable@vger.kernel.org Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250104142012.115974-1-krzysztof.kozlowski@linaro.org Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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- Jan 06, 2025
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Wasim Nazir authored
Update soc_id table for the Qualcomm QCS9075 SoC to represent qcs9075 machine. Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
Wasim Nazir <quic_wasimn@quicinc.com> Link: https://lore.kernel.org/r/20241229152332.3068172-3-quic_wasimn@quicinc.com Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Stephan Gerhold authored
On MSM8916 devices, the serial number exposed in sysfs is constant and does not change across individual devices. It's always: db410c:/sys/devices/soc0$ cat serial_number 2644893864 The firmware used on MSM8916 exposes SOCINFO_VERSION(0, 8), which does not have support for the serial_num field in the socinfo struct. There is an existing check to avoid exposing the serial number in that case, but it's not correct: When checking the item_size returned by SMEM, we need to make sure the *end* of the serial_num is within bounds, instead of comparing with the *start* offset. The serial_number currently exposed on MSM8916 devices is just an out of bounds read of whatever comes after the socinfo struct in SMEM. Fix this by changing offsetof() to offsetofend(), so that the size of the field is also taken into account. Cc: stable@vger.kernel.org Fixes: efb448d0 ("soc: qcom: Add socinfo driver") Signed-off-by:
Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20241230-qcom-socinfo-serialno-oob-v1-1-9b7a890da3da@linaro.org Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
If tensor_set_bits_atomic() is called with a mask of 0 the function will just iterate over its bit, not perform any updates and return stack value of 'ret'. Also reported by smatch: drivers/soc/samsung/exynos-pmu.c:129 tensor_set_bits_atomic() error: uninitialized symbol 'ret'. Fixes: 0b7c6075 ("soc: samsung: exynos-pmu: Add regmap support for SoCs that protect PMU regs") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250104135605.109209-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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- Jan 02, 2025
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Frederic Weisbecker authored
Use the proper API instead of open coding it. However it looks like kthreads here could be replaced by the use of a per-cpu workqueue instead. Signed-off-by:
Frederic Weisbecker <frederic@kernel.org>
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- Dec 26, 2024
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Bartosz Golaszewski authored
The rmtfs class object is never modified and can be made constant. Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20241202094903.18388-2-brgl@bgdev.pl Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Bartosz Golaszewski authored
Make it possible to build the module when COMPILE_TEST is enabled for better build coverage. Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20241202094903.18388-1-brgl@bgdev.pl Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
Simplify error handling (less gotos) over locks with guard(). Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240822164853.231087-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
If of_parse_phandle_with_args() succeeds, the OF node reference should be dropped, regardless of number of phandle arguments. Cc: stable@vger.kernel.org Fixes: 9460ae2f ("soc: qcom: Introduce common SMEM state machine code") Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240822164853.231087-2-krzysztof.kozlowski@linaro.org Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
The Last Level Cache is split into many slices, each one of which can be toggled on or off. Only certain slices are recommended to be turned on unconditionally, in order to reach optimal performance/latency/power levels. Enable WRCACHE on X1 at boot, in accordance with internal recommendations. No significant performance difference is expected. Fixes: b3cf69a4 ("soc: qcom: llcc: Add configuration data for X1E80100") Cc: stable@vger.kernel.org Reviewed-by:
Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by:
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by:
Johan Hovold <johan+linaro@kernel.org> Tested-by:
Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20241219-topic-llcc_x1e_wrcache-v3-1-b9848d9c3d63@oss.qualcomm.com Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
X1P42100 is a cousin of X1E80100, and hence can make use of the latter's configuration. Do so. Signed-off-by:
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-3-55347831d73c@oss.qualcomm.com Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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- Dec 23, 2024
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Cristian Ciocaltea authored
The helper devm_clk_bulk_get_all_enable() missed to return the number of clocks stored in the clk_bulk_data table referenced by the clks argument and, therefore, will be dropped. Use the newly introduced devm_clk_bulk_get_all_enabled() variant instead, which is consistent with devm_clk_bulk_get_all() in terms of the returned value: > 0 if one or more clocks have been stored = 0 if there are no clocks < 0 if an error occurred Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241217-clk_bulk_ena_fix-v5-1-aafbbb245155@collabora.com Acked-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by:
Stephen Boyd <sboyd@kernel.org>
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- Dec 13, 2024
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Chun-Kuang Hu authored
In order to have fine-grained control, use cmdq_pkt_eoc() and cmdq_pkt_jump_rel() to replace cmdq_pkt_finalize(). Signed-off-by:
Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by:
Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by:
Sebastian Fricke <sebastian.fricke@collabora.com> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Biju Das authored
Add a configuration option for the RZ/G3E SoC. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-6-biju.das.jz@bp.renesas.com Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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- Dec 12, 2024
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Krzysztof Kozlowski authored
Simplify error handling over locks with guard(). In few places this elimiates error gotos and local variables. Switch to guard() everywhere (except when jumps would go over scoped guard) for consistency, even if it does not bring benefit in such places. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240822164815.230167-2-krzysztof.kozlowski@linaro.org [bjorn: Rebased ontop of v6.13-rc1] Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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- Dec 09, 2024
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alice.guo authored
i.MX9 SoCs have SoC ID, SoC revision number and chip unique identifier which are provided by the corresponding ARM trusted firmware API. This patch intends to use SMC call to obtain these information and then register i.MX9 SoC as a device. Signed-off-by:
Alice Guo <alice.guo@nxp.com> Tested-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by:
Stefan Wahren <wahrenst@gmx.net> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- Dec 08, 2024
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Javier Carrasco authored
A device_node acquired via of_find_node_by_path() requires explicit calls to of_node_put() when it is no longer needed to avoid leaking the resource. Instead of adding the missing calls to of_node_put() in all execution paths, use the cleanup attribute for 'np' by means of the __free() macro, which automatically calls of_node_put() when the variable goes out of scope. Fixes: 960ddf70 ("drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs") Signed-off-by:
Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241031-soc-atmel-soc-cleanup-v2-1-73f2d235fd98@gmail.com Signed-off-by:
Claudiu Beznea <claudiu.beznea@tuxon.dev>
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- Nov 14, 2024
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Herve Codina authored
A kernel test robot detected a missing error code: qmc.c:1942 qmc_probe() warn: missing error code 'ret' Indeed, the error returned by platform_get_irq() is checked and the operation is aborted in case of failure but the ret error code is not set in that case. Set the ret error code. Reported-by:
kernel test robot <lkp@intel.com> Reported-by:
Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202411051350.KNy6ZIWA-lkp@intel.com/ Fixes: 3178d58e ("soc: fsl: cpm1: Add support for QMC") Cc: stable@vger.kernel.org Signed-off-by:
Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20241105145623.401528-1-herve.codina@bootlin.com Signed-off-by:
Christophe Leroy <christophe.leroy@csgroup.eu>
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Javier Carrasco authored
of_find_compatible_node() requires a call to of_node_put() when the pointer to the node is not required anymore to decrement its refcount and avoid leaking memory. Add the missing call to of_node_put() after the node has been used. Cc: stable@vger.kernel.org Fixes: e95f287d ("soc: fsl: handle RCPM errata A-008646 on SoC LS1021A") Signed-off-by:
Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241013-rcpm-of_node_put-v1-1-9a8e55a01eae@gmail.com Signed-off-by:
Christophe Leroy <christophe.leroy@csgroup.eu>
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Javier Carrasco authored
The non-scoped variant of this macro turns error-prone as soon as error paths are included, because explicit calls to of_node_put() are required to avoid leaking memory. Using its scoped counterpart simplifies the code by removing the need of explicit calls to of_node_put(), as they are automatically triggered as soon as the child node goes out of scope. Moreover, it is more robust as it accounts for new error paths without having to worry about decrementing the object's refcount. Note that the device_node is declared within the macro, and its explicit declaration can be dropped as well if it is not used anywhere else. Signed-off-by:
Javier Carrasco <javier.carrasco.cruz@gmail.com> Acked-by:
Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20241002-tsa-scoped-v1-1-ba6a6d657f82@gmail.com Signed-off-by:
Christophe Leroy <christophe.leroy@csgroup.eu>
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- Nov 12, 2024
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Joe Hattori authored
The struct device_link *link field in struct qcom_ice is only used to store the result of a device_link_add call with the DL_FLAG_AUTOREMOVE_SUPPLIER flag. With this flag, the resulting value can only be used to check whether the link is present or not, as per the device_link_add description, hence this commit removes the field. Signed-off-by:
Joe Hattori <joe@pf.is.s.u-tokyo.ac.jp> Link: https://lore.kernel.org/r/20241030025046.303342-1-joe@pf.is.s.u-tokyo.ac.jp Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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- Nov 06, 2024
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Manikanta Mylavarapu authored
Add SoC ID for Qualcomm IPQ5424/IPQ5404. Signed-off-by:
Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241016151528.2893599-3-quic_mmanikan@quicinc.com Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
Commit c14e64b4 ("soc: qcom: llcc: Support chipsets that can write to llcc") made the code not configure certain registers on SDM845 due to firmware security policies. That turned out only to concern SDM845, but the condition was chosen such that all other entries (for SoCs that didnot need it) were required to set .need_llcc_cfg = true. Flip the condition, so the default is "doesn't need the workaround". Signed-off-by:
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241104-topic-llcc_flip-v1-1-3003c846d131@oss.qualcomm.com [bjorn: Dropped a few newly added need_llcc_cfg uses] Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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- Nov 04, 2024
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Jingyi Wang authored
Add LLCC configuration for the QCS8300 platform. There is an errata on LB_CNT information on QCS8300 platform, hardcode num_banks to get the correct value. Signed-off-by:
Jingyi Wang <quic_jingyw@quicinc.com> Reviewed-by:
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241031-qcs8300_llcc-v3-2-bb56952cb83b@quicinc.com Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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Song Xue authored
Add LLCC configuration support for the QCS615 platform. Signed-off-by:
Song Xue <quic_songxue@quicinc.com> Link: https://lore.kernel.org/r/20241010-add_llcc_support_for_qcs615-v2-2-044432450a75@quicinc.com Signed-off-by:
Bjorn Andersson <andersson@kernel.org>
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