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32 results

amdgpu_vm.c

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    • Yong Zhao's avatar
      7bdc53f9
      drm/amdgpu: Fix a bug in amdgpu_fill_buffer() · 7bdc53f9
      Yong Zhao authored
      
      When max_bytes is not 8 bytes aligned and bo size is larger than
      max_bytes, the last 8 bytes in a ttm node may be left unchanged.
      For example, on pre SDMA 4.0, max_bytes = 0x1fffff, and the bo size
      is 0x200000, the problem will happen.
      
      In order to fix the problem, we separately store the max nums of
      PTEs/PDEs a single operation can set in amdgpu_vm_pte_funcs
      structure, rather than inferring it from bytes limit of SDMA
      constant fill, i.e. fill_max_bytes.
      
      Together with the fix, we replace the hard code value "10" in
      amdgpu_vm_bo_update_mapping() with the corresponding values from
      structure amdgpu_vm_pte_funcs.
      
      Signed-off-by: default avatarYong Zhao <yong.zhao@amd.com>
      Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      7bdc53f9
      History
      drm/amdgpu: Fix a bug in amdgpu_fill_buffer()
      Yong Zhao authored
      
      When max_bytes is not 8 bytes aligned and bo size is larger than
      max_bytes, the last 8 bytes in a ttm node may be left unchanged.
      For example, on pre SDMA 4.0, max_bytes = 0x1fffff, and the bo size
      is 0x200000, the problem will happen.
      
      In order to fix the problem, we separately store the max nums of
      PTEs/PDEs a single operation can set in amdgpu_vm_pte_funcs
      structure, rather than inferring it from bytes limit of SDMA
      constant fill, i.e. fill_max_bytes.
      
      Together with the fix, we replace the hard code value "10" in
      amdgpu_vm_bo_update_mapping() with the corresponding values from
      structure amdgpu_vm_pte_funcs.
      
      Signed-off-by: default avatarYong Zhao <yong.zhao@amd.com>
      Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    amdgpu_vm.c 74.16 KiB
    /*
     * Copyright 2008 Advanced Micro Devices, Inc.
     * Copyright 2008 Red Hat Inc.
     * Copyright 2009 Jerome Glisse.
     *
     * Permission is hereby granted, free of charge, to any person obtaining a
     * copy of this software and associated documentation files (the "Software"),
     * to deal in the Software without restriction, including without limitation
     * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     * and/or sell copies of the Software, and to permit persons to whom the
     * Software is furnished to do so, subject to the following conditions:
     *
     * The above copyright notice and this permission notice shall be included in
     * all copies or substantial portions of the Software.
     *
     * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     * OTHER DEALINGS IN THE SOFTWARE.
     *
     * Authors: Dave Airlie
     *          Alex Deucher
     *          Jerome Glisse
     */
    #include <linux/dma-fence-array.h>
    #include <linux/interval_tree_generic.h>
    #include <linux/idr.h>
    #include <drm/drmP.h>
    #include <drm/amdgpu_drm.h>
    #include "amdgpu.h"
    #include "amdgpu_trace.h"
    
    /*
     * PASID manager
     *
     * PASIDs are global address space identifiers that can be shared
     * between the GPU, an IOMMU and the driver. VMs on different devices
     * may use the same PASID if they share the same address
     * space. Therefore PASIDs are allocated using a global IDA. VMs are
     * looked up from the PASID per amdgpu_device.
     */
    static DEFINE_IDA(amdgpu_vm_pasid_ida);
    
    /**
     * amdgpu_vm_alloc_pasid - Allocate a PASID
     * @bits: Maximum width of the PASID in bits, must be at least 1
     *
     * Allocates a PASID of the given width while keeping smaller PASIDs
     * available if possible.
     *
     * Returns a positive integer on success. Returns %-EINVAL if bits==0.
     * Returns %-ENOSPC if no PASID was available. Returns %-ENOMEM on
     * memory allocation failure.
     */
    int amdgpu_vm_alloc_pasid(unsigned int bits)
    {
    	int pasid = -EINVAL;
    
    	for (bits = min(bits, 31U); bits > 0; bits--) {
    		pasid = ida_simple_get(&amdgpu_vm_pasid_ida,
    				       1U << (bits - 1), 1U << bits,
    				       GFP_KERNEL);
    		if (pasid != -ENOSPC)
    			break;
    	}
    
    	return pasid;