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32 results

common.c

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    • Ulf Hansson's avatar
      82e12d9e
      PM / Domains: Add dev_pm_domain_attach_by_id() to manage multi PM domains · 82e12d9e
      Ulf Hansson authored
      
      The existing dev_pm_domain_attach() function, allows a single PM domain to
      be attached per device. To be able to support devices that are partitioned
      across multiple PM domains, let's introduce a new interface,
      dev_pm_domain_attach_by_id().
      
      The dev_pm_domain_attach_by_id() returns a new allocated struct device with
      the corresponding attached PM domain. This enables for example a driver to
      operate on the new device from a power management point of view. The driver
      may then also benefit from using the received device, to set up so called
      device-links towards its original device. Depending on the situation, these
      links may then be dynamically changed.
      
      The new interface is typically called by drivers during their probe phase,
      in case they manages devices which uses multiple PM domains. If that is the
      case, the driver also becomes responsible of managing the detaching of the
      PM domains, which typically should be done at the remove phase. Detaching
      is done by calling the existing dev_pm_domain_detach() function and for
      each of the received devices from dev_pm_domain_attach_by_id().
      
      Note, currently its only genpd that supports multiple PM domains per
      device, but dev_pm_domain_attach_by_id() can easily by extended to cover
      other PM domain types, if/when needed.
      
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      Acked-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Tested-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Reviewed-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      82e12d9e
      History
      PM / Domains: Add dev_pm_domain_attach_by_id() to manage multi PM domains
      Ulf Hansson authored
      
      The existing dev_pm_domain_attach() function, allows a single PM domain to
      be attached per device. To be able to support devices that are partitioned
      across multiple PM domains, let's introduce a new interface,
      dev_pm_domain_attach_by_id().
      
      The dev_pm_domain_attach_by_id() returns a new allocated struct device with
      the corresponding attached PM domain. This enables for example a driver to
      operate on the new device from a power management point of view. The driver
      may then also benefit from using the received device, to set up so called
      device-links towards its original device. Depending on the situation, these
      links may then be dynamically changed.
      
      The new interface is typically called by drivers during their probe phase,
      in case they manages devices which uses multiple PM domains. If that is the
      case, the driver also becomes responsible of managing the detaching of the
      PM domains, which typically should be done at the remove phase. Detaching
      is done by calling the existing dev_pm_domain_detach() function and for
      each of the received devices from dev_pm_domain_attach_by_id().
      
      Note, currently its only genpd that supports multiple PM domains per
      device, but dev_pm_domain_attach_by_id() can easily by extended to cover
      other PM domain types, if/when needed.
      
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      Acked-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Tested-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Reviewed-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
    intel-gtt.h 941 B
    /* Common header for intel-gtt.ko and i915.ko */
    
    #ifndef _DRM_INTEL_GTT_H
    #define	_DRM_INTEL_GTT_H
    
    void intel_gtt_get(u64 *gtt_total, size_t *stolen_size,
    		   phys_addr_t *mappable_base, u64 *mappable_end);
    
    int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
    		     struct agp_bridge_data *bridge);
    void intel_gmch_remove(void);
    
    bool intel_enable_gtt(void);
    
    void intel_gtt_chipset_flush(void);
    void intel_gtt_insert_page(dma_addr_t addr,
    			   unsigned int pg,
    			   unsigned int flags);
    void intel_gtt_insert_sg_entries(struct sg_table *st,
    				 unsigned int pg_start,
    				 unsigned int flags);
    void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
    
    /* Special gtt memory types */
    #define AGP_DCACHE_MEMORY	1
    #define AGP_PHYS_MEMORY		2
    
    /* flag for GFDT type */
    #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
    
    #ifdef CONFIG_INTEL_IOMMU
    extern int intel_iommu_gfx_mapped;
    #endif
    
    #endif