Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
L
linux
Manage
Activity
Members
Labels
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Container Registry
Model registry
Operate
Environments
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Martyn Welch
linux
Commits
ea0f1b92
Commit
ea0f1b92
authored
11 years ago
by
Richard Kuo
Browse files
Options
Downloads
Patches
Plain Diff
Hexagon: set ARCH_DMA_MINALIGN
Signed-off-by:
Richard Kuo
<
rkuo@codeaurora.org
>
parent
f6b708c1
No related branches found
Branches containing commit
No related tags found
Tags containing commit
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
arch/hexagon/include/asm/cache.h
+3
-1
3 additions, 1 deletion
arch/hexagon/include/asm/cache.h
with
3 additions
and
1 deletion
arch/hexagon/include/asm/cache.h
+
3
−
1
View file @
ea0f1b92
/*
/*
* Cache definitions for the Hexagon architecture
* Cache definitions for the Hexagon architecture
*
*
* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
* Copyright (c) 2010-2011,
2014
The Linux Foundation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* it under the terms of the GNU General Public License version 2 and
...
@@ -25,6 +25,8 @@
...
@@ -25,6 +25,8 @@
#define L1_CACHE_SHIFT (5)
#define L1_CACHE_SHIFT (5)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
#define __cacheline_aligned __aligned(L1_CACHE_BYTES)
#define __cacheline_aligned __aligned(L1_CACHE_BYTES)
#define ____cacheline_aligned __aligned(L1_CACHE_BYTES)
#define ____cacheline_aligned __aligned(L1_CACHE_BYTES)
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment