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Commit f6248dd8 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
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Merge branches 'acpi-pm' and 'acpi-numa'

* acpi-pm:
  ACPI / PM / EC: Flush all EC work in acpi_freeze_sync()
  ACPI / EC: Add parameter to force disable the GPE on suspend

* acpi-numa:
  ACPI: NUMA: Fix typo in the full name of SRAT
  ACPI: NUMA: add missing include in acpi_numa.h
parents 880a6627 02cb489b
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...@@ -11,6 +11,7 @@ Required properties: ...@@ -11,6 +11,7 @@ Required properties:
- reg-names: Names of the registers. - reg-names: Names of the registers.
"amac_base": Address and length of the GMAC registers "amac_base": Address and length of the GMAC registers
"idm_base": Address and length of the GMAC IDM registers "idm_base": Address and length of the GMAC IDM registers
(required for NSP and Northstar2)
"nicpm_base": Address and length of the NIC Port Manager "nicpm_base": Address and length of the NIC Port Manager
registers (required for Northstar2) registers (required for Northstar2)
- interrupts: Interrupt number - interrupts: Interrupt number
......
Broadcom GMAC Ethernet Controller Device Tree Bindings
-------------------------------------------------------------
Required properties:
- compatible: "brcm,bgmac-nsp"
- reg: Address and length of the GMAC registers,
Address and length of the GMAC IDM registers
- reg-names: Names of the registers. Must have both "gmac_base" and
"idm_base"
- interrupts: Interrupt number
Optional properties:
- mac-address: See ethernet.txt file in the same directory
Examples:
gmac0: ethernet@18022000 {
compatible = "brcm,bgmac-nsp";
reg = <0x18022000 0x1000>,
<0x18110000 0x1000>;
reg-names = "gmac_base", "idm_base";
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
...@@ -4,7 +4,7 @@ Required properties: ...@@ -4,7 +4,7 @@ Required properties:
- compatible: Should be one of the following. - compatible: Should be one of the following.
- "rockchip,rk3066a-efuse" - for RK3066a SoCs. - "rockchip,rk3066a-efuse" - for RK3066a SoCs.
- "rockchip,rk3188-efuse" - for RK3188 SoCs. - "rockchip,rk3188-efuse" - for RK3188 SoCs.
- "rockchip,rk322x-efuse" - for RK322x SoCs. - "rockchip,rk3228-efuse" - for RK3228 SoCs.
- "rockchip,rk3288-efuse" - for RK3288 SoCs. - "rockchip,rk3288-efuse" - for RK3288 SoCs.
- "rockchip,rk3399-efuse" - for RK3399 SoCs. - "rockchip,rk3399-efuse" - for RK3399 SoCs.
- reg: Should contain the registers location and exact eFuse size - reg: Should contain the registers location and exact eFuse size
......
* Broadcom Digital Timing Engine(DTE) based PTP clock driver * Broadcom Digital Timing Engine(DTE) based PTP clock
Required properties: Required properties:
- compatible: should be "brcm,ptp-dte" - compatible: should contain the core compatibility string
and the SoC compatibility string. The SoC
compatibility string is to handle SoC specific
hardware differences.
Core compatibility string:
"brcm,ptp-dte"
SoC compatibility strings:
"brcm,iproc-ptp-dte" - for iproc based SoC's
- reg: address and length of the DTE block's NCO registers - reg: address and length of the DTE block's NCO registers
Example: Example:
ptp_dte: ptp_dte@180af650 { ptp: ptp-dte@180af650 {
compatible = "brcm,ptp-dte"; compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
reg = <0x180af650 0x10>; reg = <0x180af650 0x10>;
status = "okay"; status = "okay";
}; };
...@@ -9,7 +9,6 @@ Optional properties: ...@@ -9,7 +9,6 @@ Optional properties:
- fsl,irda-mode : Indicate the uart supports irda mode - fsl,irda-mode : Indicate the uart supports irda mode
- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
in DCE mode by default. in DCE mode by default.
- fsl,dma-size : Indicate the size of the DMA buffer and its periods
Please check Documentation/devicetree/bindings/serial/serial.txt Please check Documentation/devicetree/bindings/serial/serial.txt
for the complete list of generic properties. for the complete list of generic properties.
...@@ -29,5 +28,4 @@ uart1: serial@73fbc000 { ...@@ -29,5 +28,4 @@ uart1: serial@73fbc000 {
interrupts = <31>; interrupts = <31>;
uart-has-rtscts; uart-has-rtscts;
fsl,dte-mode; fsl,dte-mode;
fsl,dma-size = <1024 4>;
}; };
This diff is collapsed.
VERSION = 4 VERSION = 4
PATCHLEVEL = 13 PATCHLEVEL = 13
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc1 EXTRAVERSION = -rc2
NAME = Fearless Coyote NAME = Fearless Coyote
# *DOCUMENTATION* # *DOCUMENTATION*
......
...@@ -100,7 +100,7 @@ ...@@ -100,7 +100,7 @@
#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */ #define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */ #define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */ #define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
#define TIOCGPTPEER _IOR('T', 0x41, int) /* Safely open the slave */ #define TIOCGPTPEER _IO('T', 0x41) /* Safely open the slave */
#define TIOCSERCONFIG 0x5453 #define TIOCSERCONFIG 0x5453
#define TIOCSERGWILD 0x5454 #define TIOCSERGWILD 0x5454
......
...@@ -37,7 +37,7 @@ do { \ ...@@ -37,7 +37,7 @@ do { \
".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
"2:\t.asciz " #__file "\n" \ "2:\t.asciz " #__file "\n" \
".popsection\n" \ ".popsection\n" \
".pushsection __bug_table,\"a\"\n" \ ".pushsection __bug_table,\"aw\"\n" \
".align 2\n" \ ".align 2\n" \
"3:\t.word 1b, 2b\n" \ "3:\t.word 1b, 2b\n" \
"\t.hword " #__line ", 0\n" \ "\t.hword " #__line ", 0\n" \
......
...@@ -116,7 +116,7 @@ struct cpu_cache_fns { ...@@ -116,7 +116,7 @@ struct cpu_cache_fns {
void (*dma_unmap_area)(const void *, size_t, int); void (*dma_unmap_area)(const void *, size_t, int);
void (*dma_flush_range)(const void *, const void *); void (*dma_flush_range)(const void *, const void *);
}; } __no_randomize_layout;
/* /*
* Select the calling method * Select the calling method
......
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
#ifdef CONFIG_GENERIC_BUG #ifdef CONFIG_GENERIC_BUG
#define __BUG_ENTRY(flags) \ #define __BUG_ENTRY(flags) \
".pushsection __bug_table,\"a\"\n\t" \ ".pushsection __bug_table,\"aw\"\n\t" \
".align 2\n\t" \ ".align 2\n\t" \
"0: .long 1f - 0b\n\t" \ "0: .long 1f - 0b\n\t" \
_BUGVERBOSE_LOCATION(__FILE__, __LINE__) \ _BUGVERBOSE_LOCATION(__FILE__, __LINE__) \
......
...@@ -21,7 +21,7 @@ ...@@ -21,7 +21,7 @@
#define _BUG_OR_WARN(flags) \ #define _BUG_OR_WARN(flags) \
asm volatile( \ asm volatile( \
"1: .hword %0\n" \ "1: .hword %0\n" \
" .section __bug_table,\"a\",@progbits\n" \ " .section __bug_table,\"aw\",@progbits\n" \
"2: .long 1b\n" \ "2: .long 1b\n" \
" .long %1\n" \ " .long %1\n" \
" .short %2\n" \ " .short %2\n" \
...@@ -38,7 +38,7 @@ ...@@ -38,7 +38,7 @@
#define _BUG_OR_WARN(flags) \ #define _BUG_OR_WARN(flags) \
asm volatile( \ asm volatile( \
"1: .hword %0\n" \ "1: .hword %0\n" \
" .section __bug_table,\"a\",@progbits\n" \ " .section __bug_table,\"aw\",@progbits\n" \
"2: .long 1b\n" \ "2: .long 1b\n" \
" .short %1\n" \ " .short %1\n" \
" .org 2b + %2\n" \ " .org 2b + %2\n" \
......
...@@ -44,8 +44,7 @@ flat_get_relocate_addr (unsigned long relval) ...@@ -44,8 +44,7 @@ flat_get_relocate_addr (unsigned long relval)
return relval & 0x03ffffff; /* Mask out top 6 bits */ return relval & 0x03ffffff; /* Mask out top 6 bits */
} }
static inline int flat_set_persistent(unsigned long relval, static inline int flat_set_persistent(u32 relval, u32 *persistent)
unsigned long *persistent)
{ {
int type = (relval >> 26) & 7; int type = (relval >> 26) & 7;
if (type == 3) { if (type == 3) {
......
...@@ -32,7 +32,7 @@ unsigned long bfin_get_addr_from_rp(u32 *ptr, ...@@ -32,7 +32,7 @@ unsigned long bfin_get_addr_from_rp(u32 *ptr,
break; break;
case FLAT_BFIN_RELOC_TYPE_32_BIT: case FLAT_BFIN_RELOC_TYPE_32_BIT:
pr_debug("*ptr = %lx", get_unaligned(ptr)); pr_debug("*ptr = %x", get_unaligned(ptr));
val = get_unaligned(ptr); val = get_unaligned(ptr);
break; break;
...@@ -77,7 +77,7 @@ void bfin_put_addr_at_rp(u32 *ptr, u32 addr, u32 relval) ...@@ -77,7 +77,7 @@ void bfin_put_addr_at_rp(u32 *ptr, u32 addr, u32 relval)
case FLAT_BFIN_RELOC_TYPE_32_BIT: case FLAT_BFIN_RELOC_TYPE_32_BIT:
put_unaligned(addr, ptr); put_unaligned(addr, ptr);
pr_debug("new ptr =%lx", get_unaligned(ptr)); pr_debug("new ptr =%x", get_unaligned(ptr));
break; break;
} }
} }
......
...@@ -24,7 +24,7 @@ static inline int flat_get_addr_from_rp(u32 __user *rp, u32 relval, u32 flags, ...@@ -24,7 +24,7 @@ static inline int flat_get_addr_from_rp(u32 __user *rp, u32 relval, u32 flags,
u32 *addr, u32 *persistent) u32 *addr, u32 *persistent)
{ {
u32 val = get_unaligned((__force u32 *)rp); u32 val = get_unaligned((__force u32 *)rp);
if (!(flags & FLAT_FLAG_GOTPIC) if (!(flags & FLAT_FLAG_GOTPIC))
val &= 0x00ffffff; val &= 0x00ffffff;
*addr = val; *addr = val;
return 0; return 0;
......
...@@ -30,8 +30,7 @@ static inline int flat_put_addr_at_rp(u32 __user *rp, u32 addr, u32 rel) ...@@ -30,8 +30,7 @@ static inline int flat_put_addr_at_rp(u32 __user *rp, u32 addr, u32 rel)
} }
#define flat_get_relocate_addr(rel) (rel) #define flat_get_relocate_addr(rel) (rel)
static inline int flat_set_persistent(unsigned long relval, static inline int flat_set_persistent(u32 relval, u32 *persistent)
unsigned long *persistent)
{ {
return 0; return 0;
} }
......
...@@ -91,7 +91,7 @@ ...@@ -91,7 +91,7 @@
#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */ #define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */ #define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */ #define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
#define TIOCGPTPEER _IOR('T', 0x41, int) /* Safely open the slave */ #define TIOCGPTPEER _IO('T', 0x41) /* Safely open the slave */
/* I hope the range from 0x5480 on is free ... */ /* I hope the range from 0x5480 on is free ... */
#define TIOCSCTTY 0x5480 /* become controlling tty */ #define TIOCSCTTY 0x5480 /* become controlling tty */
......
...@@ -21,7 +21,7 @@ do { \ ...@@ -21,7 +21,7 @@ do { \
asm volatile( \ asm volatile( \
" syscall 15 \n" \ " syscall 15 \n" \
"0: \n" \ "0: \n" \
" .section __bug_table,\"a\" \n" \ " .section __bug_table,\"aw\" \n" \
" .long 0b,%0,%1 \n" \ " .long 0b,%0,%1 \n" \
" .previous \n" \ " .previous \n" \
: \ : \
......
...@@ -27,7 +27,7 @@ ...@@ -27,7 +27,7 @@
do { \ do { \
asm volatile("\n" \ asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \ "1:\t" PARISC_BUG_BREAK_ASM "\n" \
"\t.pushsection __bug_table,\"a\"\n" \ "\t.pushsection __bug_table,\"aw\"\n" \
"2:\t" ASM_WORD_INSN "1b, %c0\n" \ "2:\t" ASM_WORD_INSN "1b, %c0\n" \
"\t.short %c1, %c2\n" \ "\t.short %c1, %c2\n" \
"\t.org 2b+%c3\n" \ "\t.org 2b+%c3\n" \
...@@ -50,7 +50,7 @@ ...@@ -50,7 +50,7 @@
do { \ do { \
asm volatile("\n" \ asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \ "1:\t" PARISC_BUG_BREAK_ASM "\n" \
"\t.pushsection __bug_table,\"a\"\n" \ "\t.pushsection __bug_table,\"aw\"\n" \
"2:\t" ASM_WORD_INSN "1b, %c0\n" \ "2:\t" ASM_WORD_INSN "1b, %c0\n" \
"\t.short %c1, %c2\n" \ "\t.short %c1, %c2\n" \
"\t.org 2b+%c3\n" \ "\t.org 2b+%c3\n" \
...@@ -64,7 +64,7 @@ ...@@ -64,7 +64,7 @@
do { \ do { \
asm volatile("\n" \ asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \ "1:\t" PARISC_BUG_BREAK_ASM "\n" \
"\t.pushsection __bug_table,\"a\"\n" \ "\t.pushsection __bug_table,\"aw\"\n" \
"2:\t" ASM_WORD_INSN "1b\n" \ "2:\t" ASM_WORD_INSN "1b\n" \
"\t.short %c0\n" \ "\t.short %c0\n" \
"\t.org 2b+%c1\n" \ "\t.org 2b+%c1\n" \
......
...@@ -60,7 +60,7 @@ ...@@ -60,7 +60,7 @@
#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */ #define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */ #define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */ #define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
#define TIOCGPTPEER _IOR('T', 0x41, int) /* Safely open the slave */ #define TIOCGPTPEER _IO('T', 0x41) /* Safely open the slave */
#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ #define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
#define FIOCLEX 0x5451 #define FIOCLEX 0x5451
......
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