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# SPDX-License-Identifier: GPL-2.0+
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#
# (C) Copyright 2000 - 2013
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.

Summary:
========

This directory contains the source code for U-Boot, a boot loader for
Embedded boards based on PowerPC, ARM, MIPS and several other
processors, which can be installed in a boot ROM and used to
initialize and test the hardware or to download and run application
code.
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The development of U-Boot is closely related to Linux: some parts of
the source code originate in the Linux source tree, we have some
header files in common, and special provision has been made to
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support booting of Linux images.

Some attention has been paid to make this software easily
configurable and extendable. For instance, all monitor commands are
implemented with the same call interface, so that it's very easy to
add new commands. Also, instead of permanently adding rarely used
code (for instance hardware test utilities) to the monitor, you can
load and run it dynamically.


Status:
=======

In general, all boards for which a default configuration file exists in the
configs/ directory have been tested to some extent and can be considered
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"working". In fact, many of them are used in production systems.

In case of problems you can use
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     scripts/get_maintainer.pl <path>
to identify the people or companies responsible for various boards and
subsystems. Or have a look at the git log.
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Where to get help:
==================

In case you have questions about, problems with or contributions for
U-Boot, you should send a message to the U-Boot mailing list at
<u-boot@lists.denx.de>. There is also an archive of previous traffic
on the mailing list - please search the archive before asking FAQ's.
Please see https://lists.denx.de/pipermail/u-boot and
https://marc.info/?l=u-boot
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Where to get source code:
=========================

The U-Boot source code is maintained in the Git repository at
https://source.denx.de/u-boot/u-boot.git ; you can browse it online at
https://source.denx.de/u-boot/u-boot
The "Tags" links on this page allow you to download tarballs of
any version you might be interested in. Official releases are also
available from the DENX file server through HTTPS or FTP.
https://ftp.denx.de/pub/u-boot/
ftp://ftp.denx.de/pub/u-boot/
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Where we come from:
===================

- start from 8xxrom sources
- create PPCBoot project (https://sourceforge.net/projects/ppcboot)
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- clean up code
- make it easier to add custom boards
- make it possible to add other [PowerPC] CPUs
- extend functions, especially:
  * Provide extended interface to Linux boot loader
  * S-Record download
  * network boot
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  * ATA disk / SCSI ... boot
- create ARMBoot project (https://sourceforge.net/projects/armboot)
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- add other CPU families (starting with ARM)
- create U-Boot project (https://sourceforge.net/projects/u-boot)
- current project page: see https://www.denx.de/wiki/U-Boot


Names and Spelling:
===================

The "official" name of this project is "Das U-Boot". The spelling
"U-Boot" shall be used in all written text (documentation, comments
in source files etc.). Example:

	This is the README file for the U-Boot project.

File names etc. shall be based on the string "u-boot". Examples:

	include/asm-ppc/u-boot.h

	#include <asm/u-boot.h>

Variable names, preprocessor constants etc. shall be either based on
the string "u_boot" or on "U_BOOT". Example:

	U_BOOT_VERSION		u_boot_logo
	IH_OS_U_BOOT		u_boot_hush_start
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Software Configuration:
=======================

Selection of Processor Architecture and Board Type:
---------------------------------------------------

For all supported boards there are ready-to-use default
configurations available; just type "make <board_name>_defconfig".
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Example: For a TQM823L module type:

	cd u-boot
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Note: If you're looking for the default configuration file for a board
you're sure used to be there but is now missing, check the file
doc/README.scrapyard for a list of no longer supported boards.
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Sandbox Environment:
--------------------

U-Boot can be built natively to run on a Linux host using the 'sandbox'
board. This allows feature development which is not board- or architecture-
specific to be undertaken on a native platform. The sandbox is also used to
run some of U-Boot's tests.

See doc/arch/sandbox/sandbox.rst for more details.
Board Initialisation Flow:
--------------------------

This is the intended start-up flow for boards. This should apply for both
SPL and U-Boot proper (i.e. they both follow the same rules).

Note: "SPL" stands for "Secondary Program Loader," which is explained in
more detail later in this file.

At present, SPL mostly uses a separate code path, but the function names
and roles of each function are the same. Some boards or architectures
may not conform to this.  At least most ARM boards which use
CONFIG_SPL_FRAMEWORK conform to this.

Execution typically starts with an architecture-specific (and possibly
CPU-specific) start.S file, such as:

	- arch/arm/cpu/armv7/start.S
	- arch/powerpc/cpu/mpc83xx/start.S
	- arch/mips/cpu/start.S
and so on. From there, three functions are called; the purpose and
limitations of each of these functions are described below.

lowlevel_init():
	- purpose: essential init to permit execution to reach board_init_f()
	- no global_data or BSS
	- there is no stack (ARMv7 may have one but it will soon be removed)
	- must not set up SDRAM or use console
	- must only do the bare minimum to allow execution to continue to
		board_init_f()
	- this is almost never needed
	- return normally from this function

board_init_f():
	- purpose: set up the machine ready for running board_init_r():
		i.e. SDRAM and serial UART
	- global_data is available
	- stack is in SRAM
	- BSS is not available, so you cannot use global/static variables,
		only stack variables and global_data

	Non-SPL-specific notes:
	- dram_init() is called to set up DRAM. If already done in SPL this
		can do nothing

	SPL-specific notes:
	- you can override the entire board_init_f() function with your own
		version as needed.
	- preloader_console_init() can be called here in extremis
	- should set up SDRAM, and anything needed to make the UART work
	- there is no need to clear BSS, it will be done by crt0.S
	- for specific scenarios on certain architectures an early BSS *can*
	  be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
	  of BSS prior to entering board_init_f()) but doing so is discouraged.
	  Instead it is strongly recommended to architect any code changes
	  or additions such to not depend on the availability of BSS during
	  board_init_f() as indicated in other sections of this README to
	  maintain compatibility and consistency across the entire code base.
	- must return normally from this function (don't call board_init_r()
		directly)

Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
this point the stack and global_data are relocated to below
CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
memory.

board_init_r():
	- purpose: main execution, common code
	- global_data is available
	- SDRAM is available
	- BSS is available, all static/global variables can be used
	- execution eventually continues to main_loop()

	Non-SPL-specific notes:
	- U-Boot is relocated to the top of memory and is now running from
		there.

	SPL-specific notes:
	- stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
		CONFIG_SYS_FSL_HAS_CCI400

		Defined For SoC that has cache coherent interconnect
		CCN-400
		CONFIG_SYS_FSL_HAS_CCN504

		Defined for SoC that has cache coherent interconnect CCN-504

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The following options need to be configured:

- CPU Type:	Define exactly one, e.g. CONFIG_MPC85XX.

- Board Type:	Define exactly one, e.g. CONFIG_MPC8540ADS.
		CONFIG_SYS_PPC64

		Specifies that the core is a 64-bit PowerPC implementation (implements
		the "64" category of the Power ISA). This is necessary for ePAPR
		compliance, among other possible reasons.

		CONFIG_SYS_FSL_ERRATUM_A004510

		Enables a workaround for erratum A004510.  If set,
		then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
		CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.

		CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
		CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)

		Defines one or two SoC revisions (low 8 bits of SVR)
		for which the A004510 workaround should be applied.

		The rest of SVR is either not relevant to the decision
		of whether the erratum is present (e.g. p2040 versus
		p2041) or is implied by the build target, which controls
		whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.

		See Freescale App Note 4493 for more information about
		this erratum.

		CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY

		This is the value to write into CCSR offset 0x18600
		according to the A004510 workaround.

		CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
		Single Source Clock is clocking mode present in some of FSL SoC's.
		In this mode, a single differential clock is used to supply
		clocks to the sysclock, ddrclock and usbclock.

- Generic CPU options:

		CONFIG_SYS_FSL_DDR
		Freescale DDR driver in use. This type of DDR controller is
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		found in mpc83xx, mpc85xx as well as some ARM core SoCs.
		Freescale DDR memory-mapped register base.

		CONFIG_SYS_FSL_IFC_CLK_DIV
		Defines divider of platform clock(clock input to IFC controller).

		CONFIG_SYS_FSL_LBC_CLK_DIV
		Defines divider of platform clock(clock input to eLBC controller).

		CFG_SYS_FSL_DDR_SDRAM_BASE_PHY
		Physical address from the view of DDR controllers. It is the
		same as CFG_SYS_DDR_SDRAM_BASE for  all Power SoCs. But
		it could be different for ARM SoCs.

		CFG_SYS_EXCEPTION_VECTORS_HIGH

		Select high exception vectors of the ARM core, e.g., do not
		clear the V bit of the c1 register of CP15.

		COUNTER_FREQUENCY
		Generic timer clock source frequency.

		COUNTER_FREQUENCY_REAL
		Generic timer clock source frequency if the real clock is
		different from COUNTER_FREQUENCY, and can only be determined
		at run time.

- Tegra SoC options:
		CONFIG_TEGRA_SUPPORT_NON_SECURE

		Support executing U-Boot in non-secure (NS) mode. Certain
		impossible actions will be skipped if the CPU is in NS mode,
		such as ARM architectural timer initialization.

- Linux Kernel Interface:
		CONFIG_OF_LIBFDT

		New kernel versions are expecting firmware settings to be
		passed using flattened device trees (based on open firmware
		concepts).

		CONFIG_OF_LIBFDT
		 * New libfdt-based support
		 * Adds the "fdt" command
		 * The bootm command automatically updates the fdt
		OF_TBCLK - The timebase frequency.

		boards with QUICC Engines require OF_QE to set UCC MAC
		addresses
		CONFIG_OF_IDE_FIXUP

		U-Boot can detect if an IDE device is present or not.
		If not, and this new config option is activated, U-Boot
		removes the ATA node from the DTS before booting Linux,
		so the Linux IDE driver does not probe the device and
		crash. This is needed for buggy hardware (uc101) where
		no pull down resistor is connected to the signal IDE5V_DD7.

- vxWorks boot parameters:

		bootvx constructs a valid bootline using the following
		environments variables: bootdev, bootfile, ipaddr, netmask,
		serverip, gatewayip, hostname, othbootargs.
		It loads the vxWorks image pointed bootfile.

		Note: If a "bootargs" environment is defined, it will override
		the defaults discussed just above.

- Cache Configuration for ARM:
		CFG_SYS_PL310_BASE - Physical base address of PL310
					controller register space

- Serial Ports:
		CFG_PL011_CLOCK

		If you have Amba PrimeCell PL011 UARTs, set this variable to
		the clock speed of the UARTs.

		CFG_PL01x_PORTS

		If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
		define this to a list of base addresses for each (supported)
		port. See e.g. include/configs/versatile.h

		CONFIG_SERIAL_HW_FLOW_CONTROL

		Define this variable to enable hw flow control in serial driver.
		Current user of this option is drivers/serial/nsl16550.c driver
- Removal of commands
		If no commands are needed to boot, you can disable
		CONFIG_CMDLINE to remove them. In this case, the command line
		will not be available, and when U-Boot wants to execute the
		boot command (on start-up) it will call board_run_command()
		instead. This can reduce image size significantly for very
		simple boot procedures.

- Regular expression support:
		CONFIG_REGEX
		If this variable is defined, U-Boot is linked against
		the SLRE (Super Light Regular Expression) library,
		which adds regex support to some commands, as for
		example "env grep" and "setexpr".
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- Watchdog:
		CFG_SYS_WATCHDOG_FREQ
		Some platforms automatically call WATCHDOG_RESET()
		from the timer interrupt handler every
		CFG_SYS_WATCHDOG_FREQ interrupts. If not set by the
		board configuration file, a default of CONFIG_SYS_HZ/2
		(i.e. 500) is used. Setting CFG_SYS_WATCHDOG_FREQ
		to 0 disables calling WATCHDOG_RESET() from the timer
		interrupt.

- GPIO Support:
		The CFG_SYS_I2C_PCA953X_WIDTH option specifies a list of
		chip-ngpio pairs that tell the PCA953X driver the number of
		pins supported by a particular chip.

		Note that if the GPIO device uses I2C, then the I2C interface
		must also be configured. See I2C Support, below.

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- I/O tracing:
		When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
		accesses and can checksum them or write a list of them out
		to memory. See the 'iotrace' command for details. This is
		useful for testing device drivers since it can confirm that
		the driver behaves the same way before and after a code
		change. Currently this is supported on sandbox and arm. To
		add support for your architecture, add '#include <iotrace.h>'
		to the bottom of arch/<arch>/include/asm/io.h and test.

		Example output from the 'iotrace stats' command is below.
		Note that if the trace buffer is exhausted, the checksum will
		still continue to operate.

			iotrace is enabled
			Start:  10000000	(buffer start address)
			Size:   00010000	(buffer size)
			Offset: 00000120	(current buffer offset)
			Output: 10000120	(start + offset)
			Count:  00000018	(number of trace records)
			CRC32:  9526fb66	(CRC32 of all trace records)

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- Timestamp Support:

		When CONFIG_TIMESTAMP is selected, the timestamp
		(date and time) of an image is printed by image
		commands like bootm or iminfo. This option is
		automatically enabled when you select CONFIG_CMD_DATE .
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- Partition Labels (disklabels) Supported:
		Zero or more of the following:
		CONFIG_MAC_PARTITION   Apple's MacOS partition table.
		CONFIG_ISO_PARTITION   ISO partition table, used on CDROM etc.
		CONFIG_EFI_PARTITION   GPT partition table, common when EFI is the
				       bootloader.  Note 2TB partition limit; see
				       disk/part_efi.c
		CONFIG_SCSI) you must configure support for at
		least one non-MTD partition type as well.
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- NETWORK Support (PCI):
		CONFIG_E1000_SPI
		Utility code for direct access to the SPI bus on Intel 8257x.
		This does not do anything useful unless you set at least one
		of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.

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		CONFIG_NATSEMI
		Support for National dp83815 chips.

		CONFIG_NS8382X
		Support for National dp8382[01] gigabit chips.

- NETWORK Support (other):
		CONFIG_CALXEDA_XGMAC
		Support for the Calxeda XGMAC device

		Support for SMSC's LAN91C96 chips.

			CONFIG_LAN91C96_USE_32_BIT
			Define this to enable 32 bit addressing

			CFG_SYS_DAVINCI_EMAC_PHY_COUNT
			Define this if you have more then 3 PHYs.

		CONFIG_FTGMAC100
		Support for Faraday's FTGMAC100 Gigabit SoC Ethernet

			CONFIG_FTGMAC100_EGIGA
			Define this to use GE link update with gigabit PHY.
			Define this if FTGMAC100 is connected to gigabit PHY.
			If your system has 10/100 PHY only, it might not occur
			wrong behavior. Because PHY usually return timeout or
			useless data when polling gigabit status and gigabit
			control registers. This behavior won't affect the
			correctnessof 10/100 link speed update.

		CONFIG_SH_ETHER
		Support for Renesas on-chip Ethernet controller

			CFG_SH_ETHER_USE_PORT
			Define the number of ports to be used

			CFG_SH_ETHER_PHY_ADDR
			Define the ETH PHY's address

			CFG_SH_ETHER_CACHE_WRITEBACK
			If this option is set, the driver enables cache flush.

- TPM Support:
		CONFIG_TPM
		Support TPM devices.

		CONFIG_TPM_TIS_INFINEON
		Support for Infineon i2c bus TPM devices. Only one device
		per system is supported at this time.

			CONFIG_TPM_TIS_I2C_BURST_LIMITATION
			Define the burst count bytes upper limit

		CONFIG_TPM_ST33ZP24
		Support for STMicroelectronics TPM devices. Requires DM_TPM support.

			CONFIG_TPM_ST33ZP24_I2C
			Support for STMicroelectronics ST33ZP24 I2C devices.
			Requires TPM_ST33ZP24 and I2C.

			CONFIG_TPM_ST33ZP24_SPI
			Support for STMicroelectronics ST33ZP24 SPI devices.
			Requires TPM_ST33ZP24 and SPI.

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		CONFIG_TPM_ATMEL_TWI
		Support for Atmel TWI TPM device. Requires I2C support.

		CONFIG_TPM_TIS_LPC
		Support for generic parallel port TPM devices. Only one device
		per system is supported at this time.

		CONFIG_TPM
		Define this to enable the TPM support library which provides
		functional interfaces to some TPM commands.
		Requires support for a TPM device.

		CONFIG_TPM_AUTH_SESSIONS
		Define this to enable authorized functions in the TPM library.
		Requires CONFIG_TPM and CONFIG_SHA1.

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- USB Support:
		At the moment only the UHCI host controller is
		supported (PIP405, MIP405); define
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		CONFIG_USB_UHCI to enable it.
		define CONFIG_USB_KEYBOARD to enable the USB Keyboard
		and define CONFIG_USB_STORAGE to enable the USB
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		storage devices.
		Note:
		Supported are USB Keyboards and USB Floppy drives
		(TEAC FD-05PUB).
		CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
		HW module registers.

- USB Device:
		Define the below if you wish to use the USB console.
		Once firmware is rebuilt from a serial console issue the
		command "setenv stdin usbtty; setenv stdout usbtty" and
		attach your USB cable. The Unix command "dmesg" should print
		it has found a new device. The environment variable usbtty
		can be set to gserial or cdc_acm to enable your device to
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		appear to a USB host as a Linux gserial device or a
		Common Device Class Abstract Control Model serial device.
		If you select usbtty = gserial you should be able to enumerate
		a Linux host by
		# modprobe usbserial vendor=0xVendorID product=0xProductID
		else if using cdc_acm, simply setting the environment
		variable usbtty to be cdc_acm should suffice. The following
		might be defined in YourBoardName.h
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		If you have a USB-IF assigned VendorID then you may wish to
		define your own vendor specific values either in BoardName.h
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		or directly in usbd_vendor_info.h. If you don't define
		CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
		CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
		should pretend to be a Linux device to it's target host.

			CONFIG_USBD_MANUFACTURER
			Define this string as the name of your company for
			- CONFIG_USBD_MANUFACTURER "my company"
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			CONFIG_USBD_PRODUCT_NAME
			Define this string as the name of your product
			- CONFIG_USBD_PRODUCT_NAME "acme usb device"

			CONFIG_USBD_VENDORID
			Define this as your assigned Vendor ID from the USB
			Implementors Forum. This *must* be a genuine Vendor ID
			to avoid polluting the USB namespace.
			- CONFIG_USBD_VENDORID 0xFFFF
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			CONFIG_USBD_PRODUCTID
			Define this as the unique Product ID
			for your device
			- CONFIG_USBD_PRODUCTID 0xFFFF
- ULPI Layer Support:
		The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
		the generic ULPI layer. The generic layer accesses the ULPI PHY
		via the platform viewport, so you need both the genric layer and
		the viewport enabled. Currently only Chipidea/ARC based
		viewport is supported.
		To enable the ULPI layer support, define CONFIG_USB_ULPI and
		CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
		If your ULPI phy needs a different reference clock than the
		standard 24 MHz then you have to define CFG_ULPI_REF_CLK to
		the appropriate value in Hz.
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		CONFIG_SH_MMCIF
		Support for Renesas on-chip MMCIF controller

			CONFIG_SH_MMCIF_ADDR
			Define the base address of MMCIF registers

			CONFIG_SH_MMCIF_CLK
			Define the clock frequency for MMCIF

- USB Device Firmware Update (DFU) class support:
		CONFIG_DFU_OVER_USB
		This enables the USB portion of the DFU USB class

		CONFIG_DFU_NAND
		This enables support for exposing NAND devices via DFU.

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		CONFIG_DFU_RAM
		This enables support for exposing RAM via DFU.
		Note: DFU spec refer to non-volatile memory usage, but
		allow usages beyond the scope of spec - here RAM usage,
		one that would help mostly the developer.

		CONFIG_SYS_DFU_DATA_BUF_SIZE
		Dfu transfer uses a buffer before writing data to the
		raw storage device. Make the size (in bytes) of this buffer
		configurable. The size of this buffer is also configurable
		through the "dfu_bufsiz" environment variable.

		CONFIG_SYS_DFU_MAX_FILE_SIZE
		When updating files rather than the raw storage device,
		we use a static buffer to copy the file into and then write
		the buffer once we've been given the whole file.  Define
		this to the maximum filesize (in bytes) for the buffer.
		Default is 4 MiB if undefined.

		DFU_DEFAULT_POLL_TIMEOUT
		Poll timeout [ms], is the timeout a device can send to the
		host. The host must wait for this timeout before sending
		a subsequent DFU_GET_STATUS request to the device.

		DFU_MANIFEST_POLL_TIMEOUT
		Poll timeout [ms], which the device sends to the host when
		entering dfuMANIFEST state. Host waits this timeout, before
		sending again an USB request to the device.

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- Keyboard Support:
		See Kconfig help for available keyboard drivers.

- MII/PHY support:
		CONFIG_PHY_CLOCK_FREQ (ppc4xx)

		The clock frequency of the MII bus

		CONFIG_PHY_CMD_DELAY (ppc4xx)

		Some PHY like Intel LXT971A need extra delay after
		command issued before MII status register can be read

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- BOOTP Recovery Mode:
		CONFIG_BOOTP_RANDOM_DELAY

		If you have many targets in a network that try to
		boot using BOOTP, you may want to avoid that all
		systems send out BOOTP requests at precisely the same
		moment (which would happen for instance at recovery
		from a power failure, when all systems will try to
		boot, thus flooding the BOOTP server. Defining
		CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
		inserted before sending out BOOTP requests. The
		following delays are inserted then:
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		1st BOOTP request:	delay 0 ... 1 sec
		2nd BOOTP request:	delay 0 ... 2 sec
		3rd BOOTP request:	delay 0 ... 4 sec
		4th and following
		BOOTP requests:		delay 0 ... 8 sec

		CFG_BOOTP_ID_CACHE_SIZE

		BOOTP packets are uniquely identified using a 32-bit ID. The
		server will copy the ID from client requests to responses and
		U-Boot will use this to determine if it is the destination of
		an incoming response. Some servers will check that addresses
		aren't in use before handing them out (usually using an ARP
		ping) and therefore take up to a few hundred milliseconds to
		respond. Network congestion may also influence the time it
		takes for a response to make it back to the client. If that
		time is too long, U-Boot will retransmit requests. In order
		to allow earlier responses to still be accepted after these
		retransmissions, U-Boot's BOOTP client keeps a small cache of
		IDs. The CFG_BOOTP_ID_CACHE_SIZE controls the size of this
		cache. The default is to keep IDs for up to four outstanding
		requests. Increasing this will allow U-Boot to accept offers
		from a BOOTP client in networks with unusually high latency.

 - Link-local IP address negotiation:
		Negotiate with other link-local clients on the local network
		for an address that doesn't require explicit configuration.
		This is especially useful if a DHCP server cannot be guaranteed
		to exist in all environments that the device must operate.

		See doc/README.link-local for more information.

 - MAC address from environment variables

		FDT_SEQ_MACADDR_FROM_ENV

		Fix-up device tree with MAC addresses fetched sequentially from
		environment variables. This config work on assumption that
		non-usable ethernet node of device-tree are either not present
		or their status has been marked as "disabled".

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		CONFIG_CDP_DEVICE_ID

		The device id used in CDP trigger frames.

		CONFIG_CDP_DEVICE_ID_PREFIX

		A two character string which is prefixed to the MAC address
		of the device.

		CONFIG_CDP_PORT_ID

		A printf format string which contains the ascii name of
		the port. Normally is set to "eth%d" which sets
		eth0 for the first Ethernet, eth1 for the second etc.

		CONFIG_CDP_CAPABILITIES

		A 32bit integer which indicates the device capabilities;
		0x00000010 for a normal host which does not forwards.

		CONFIG_CDP_VERSION

		An ascii string containing the version of the software.

		CONFIG_CDP_PLATFORM

		An ascii string containing the name of the platform.

		CONFIG_CDP_TRIGGER

		A 32bit integer sent on the trigger.

		CONFIG_CDP_POWER_CONSUMPTION

		A 16bit integer containing the power consumption of the
		device in .1 of milliwatts.

		CONFIG_CDP_APPLIANCE_VLAN_TYPE

		A byte containing the id of the VLAN.

- Status LED:	CONFIG_LED_STATUS
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		Several configurations allow to display the current
		status using a LED. For instance, the LED will blink
		fast while running U-Boot code, stop blinking as
		soon as a reply to a BOOTP request was received, and
		start blinking slow once the Linux kernel is running
		(supported by a status LED driver in the Linux
		kernel). Defining CONFIG_LED_STATUS enables this
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		feature in U-Boot.

		CONFIG_LED_STATUS_GPIO
		The status LED can be connected to a GPIO pin.
		In such cases, the gpio_led driver can be used as a
		status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
		to include the gpio_led driver in the U-Boot binary.

		CFG_GPIO_LED_INVERTED_TABLE
		Some GPIO connected LEDs may have inverted polarity in which
		case the GPIO high value corresponds to LED off state and
		GPIO low value corresponds to LED on state.
		In such cases CFG_GPIO_LED_INVERTED_TABLE may be defined
		with a list of GPIO LEDs that have inverted polarity.

		Hold the number of i2c buses you want to use.
		CFG_SYS_I2C_DIRECT_BUS
		define this, if you don't use i2c muxes on your hardware.
		if CFG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
		CFG_SYS_I2C_MAX_HOPS
		define how many muxes are maximal consecutively connected
		on one i2c bus. If you not use i2c muxes, omit this
		define.

		CFG_SYS_I2C_BUSES
		hold a list of buses you want to use, only used if
		CFG_SYS_I2C_DIRECT_BUS is not defined, for example
		a board with CFG_SYS_I2C_MAX_HOPS = 1 and
		CFG_SYS_NUM_I2C_BUSES = 9:
		 CFG_SYS_I2C_BUSES	{{0, {I2C_NULL_HOP}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
					{1, {I2C_NULL_HOP}}, \
					{1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
					{1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
					}

		which defines
			bus 0 on adapter 0 without a mux
			bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
			bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
			bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
			bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
			bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
			bus 6 on adapter 1 without a mux
			bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
			bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2

		If you do not have i2c muxes on your board, omit this define.

- Legacy I2C Support:
		If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
		then the following macros need to be defined (examples are
		from include/configs/lwmon.h):
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		I2C_INIT

		(Optional). Any commands necessary to enable the I2C
		controller or configure ports.
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		eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |=	PB_SCL)
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		I2C_ACTIVE

		The code necessary to make the I2C data line active
		(driven).  If the data line is open collector, this
		define can be null.

		eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |=  PB_SDA)

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		I2C_TRISTATE

		The code necessary to make the I2C data line tri-stated
		(inactive).  If the data line is open collector, this
		define can be null.

		eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)

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		I2C_READ

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		Code that returns true if the I2C data line is high,
		false if it is low.
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		eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)

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		I2C_SDA(bit)

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		If <bit> is true, sets the I2C data line high. If it
		is false, it clears it (low).
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		eg: #define I2C_SDA(bit) \
			if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
			else	immr->im_cpm.cp_pbdat &= ~PB_SDA
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		I2C_SCL(bit)

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		If <bit> is true, sets the I2C clock line high. If it
		is false, it clears it (low).
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		eg: #define I2C_SCL(bit) \
			if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
			else	immr->im_cpm.cp_pbdat &= ~PB_SCL
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		I2C_DELAY

		This delay is invoked four times per clock cycle so this
		controls the rate of data transfer.  The data rate thus
		is 1 / (I2C_DELAY * 4). Often defined to be something
		#define I2C_DELAY  udelay(2)
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		CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA

		If your arch supports the generic GPIO framework (asm/gpio.h),
		then you may alternatively define the two GPIOs that are to be
		used as SCL / SDA.  Any of the previous I2C_xxx macros will
		have GPIO-based defaults assigned to them as appropriate.

		You should define these to the GPIO value as given directly to
		the generic GPIO functions.

		CFG_I2C_MULTI_BUS

		This option allows the use of multiple I2C buses, each of which
		must have a controller.	 At any point in time, only one bus is
		active.	 To switch to a different bus, use the 'i2c dev' command.
		Note that bus numbering is zero-based.

		CFG_SYS_I2C_NOPROBES

		This option specifies a list of I2C devices that will be skipped
		when the 'i2c probe' command is issued.
			#define CFG_SYS_I2C_NOPROBES {0x50,0x68}

		will skip addresses 0x50 and 0x68 on a board with one I2C bus

		CFG_SYS_RTC_BUS_NUM

		If defined, then this indicates the I2C bus number for the RTC.
		If not defined, then U-Boot assumes that RTC is on I2C bus 0.

		CONFIG_SOFT_I2C_READ_REPEATED_START

		defining this will force the i2c_read() function in
		the soft_i2c driver to perform an I2C repeated start
		between writing the address pointer and reading the
		data.  If this define is omitted the default behaviour
		of doing a stop-start sequence will be used.  Most I2C
		devices can use either method, but some require one or
		the other.
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- SPI Support:	CONFIG_SPI

		Enables SPI driver (so far only tested with
		SPI EEPROM, also an instance works with Crystal A/D and
		D/As on the SACSng board)

		CFG_SYS_SPI_MXC_WAIT
		Timeout for waiting until spi transfer completed.
		default: (CONFIG_SYS_HZ/100)     /* 10 ms */

- FPGA Support: CONFIG_FPGA
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		Enables FPGA subsystem.

		CONFIG_FPGA_<vendor>

		Enables support for specific chip vendors.
		(ALTERA, XILINX)
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		CONFIG_FPGA_<family>
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		Enables support for FPGA family.
		(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)

		CONFIG_SYS_FPGA_CHECK_BUSY
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		Enable checks on FPGA configuration interface busy
		status by the configuration function. This option
		will require a board or device specific function to
		be written.
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		CFG_FPGA_DELAY
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		If defined, a function that provides delays in the FPGA
		configuration driver.

		CFG_SYS_FPGA_CHECK_ERROR
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		Check for configuration errors during FPGA bitfile
		loading. For example, abort during Virtex II
		configuration if the INIT_B line goes low (which
		indicated a CRC error).
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		CFG_SYS_FPGA_WAIT_INIT
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		Maximum time to wait for the INIT_B line to de-assert
		after PROB_B has been de-asserted during a Virtex II
		FPGA configuration sequence. The default time is 500
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		CFG_SYS_FPGA_WAIT_BUSY
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		Maximum time to wait for BUSY to de-assert during
		Virtex II FPGA configuration. The default is 5 ms.
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		CFG_SYS_FPGA_WAIT_CONFIG
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		Time to wait after FPGA configuration. The default is
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- Vendor Parameter Protection:

		U-Boot considers the values of the environment
		variables "serial#" (Board Serial Number) and
		"ethaddr" (Ethernet Address) to be parameters that
		are set once by the board vendor / manufacturer, and
		protects these variables from casual modification by
		the user. Once set, these variables are read-only,
		and write or delete attempts are rejected. You can
		change this behaviour:
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		If CONFIG_ENV_OVERWRITE is #defined in your config
		file, the write protection for vendor parameters is
		completely disabled. Anybody can change or delete
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		these parameters.