• Abhishek Sahu's avatar
    i2c: qup: reorganization of driver code to remove polling for qup v2 · 7545c7db
    Abhishek Sahu authored
    Following are the major issues in current driver code
    1. The current driver simply assumes the transfer completion
       whenever its gets any non-error interrupts and then simply do the
       polling of available/free bytes in FIFO.
    2. The block mode is not working properly since no handling in
       being done for OUT_BLOCK_WRITE_REQ and IN_BLOCK_READ_READ.
    3. An i2c transfer can contain multiple message and QUP v2
       supports reconfiguration during run in which the mode should be same
       for all the sub transfer. Currently the mode is being programmed
       before every sub transfer which is functionally wrong. If one message
       is less than FIFO length and other message is greater than FIFO
       length, then transfers will fail.
    Because of above, i2c v2 transfers of size greater than 64 are failing
    with following error message
    	i2c_qup 78b6000.i2c: timeout for fifo out full
    To make block mode working properly and move to use the interrupts
    instead of polling, major code reorganization is required. Following
    are the major changes done in this patch
    1. Remove the polling of TX FIFO free space and RX FIFO available
       bytes and move to interrupts completely. QUP has QUP_MX_OUTPUT_DONE,
       interrupts to handle FIFO’s properly so check all these interrupts.
    2. Determine the mode for transfer before starting by checking
       all the tx/rx data length in each message. The complete message can be
       transferred either in DMA mode or Programmed IO by FIFO/Block mode.
       in DMA mode, both tx and rx uses same mode but in PIO mode, the TX and
       RX can be in different mode.
    3. During write, For FIFO mode, TX FIFO can be directly written
       without checking for FIFO space. For block mode, the QUP will generate
       OUT_BLOCK_WRITE_REQ interrupt whenever it has block size of available
    4. During read, both TX and RX FIFO will be used. TX will be used
       for writing tags and RX will be used for receiving the data. In QUP,
       TX and RX can operate in separate mode so configure modes accordingly.
    5. For read FIFO mode, wait for QUP_MX_INPUT_DONE interrupt which
       will be generated after all the bytes have been copied in RX FIFO. For
       read Block mode, QUP will generate IN_BLOCK_READ_REQ interrupts
       whenever it has block size of available data.
    6. Split the transfer in chunk of one QUP block size(256 bytes)
       and schedule each block separately. QUP v2 supports reconfiguration
       during run in which QUP can transfer multiple blocks without issuing a
       stop events.
    7. Port the SMBus block read support for new code changes.
    Signed-off-by: default avatarAbhishek Sahu <absahu@codeaurora.org>
    Reviewed-by: default avatarSricharan R <sricharan@codeaurora.org>
    Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
i2c-qup.c 48.2 KB