Commit 757642f9 authored by Andrew Lunn's avatar Andrew Lunn Committed by Linus Walleij

gpio: mvebu: Add limited PWM support

Armada 370/XP devices can 'blink' GPIO lines with a configurable on
and off period. This can be modelled as a PWM.

However, there are only two sets of PWM configuration registers for
all the GPIO lines. This driver simply allows a single GPIO line per
GPIO chip of 32 lines to be used as a PWM. Attempts to use more return

Due to the interleaving of registers it is not simple to separate the
PWM driver from the GPIO driver. Thus the GPIO driver has been
extended with a PWM driver.
Signed-off-by: default avatarAndrew Lunn <>
[Ralph Sennhauser:
  * Port forward
  * Merge PWM portion into gpio-mvebu.c
  * Switch to atomic PWM API
  * Add new compatible string marvell,armada-370-xp-gpio
  * Update and merge documentation patch
Signed-off-by: default avatarRalph Sennhauser <>
Tested-by: default avatarAndrew Lunn <>
Acked-by: default avatarThierry Reding <>
Acked-by: default avatarRob Herring <>
Signed-off-by: default avatarLinus Walleij <>
parent 6f79309a
......@@ -38,6 +38,24 @@ Required properties:
- #gpio-cells: Should be two. The first cell is the pin number. The
second cell is reserved for flags, unused at the moment.
Optional properties:
In order to use the GPIO lines in PWM mode, some additional optional
properties are required. Only Armada 370 and XP support these properties.
- compatible: Must contain "marvell,armada-370-xp-gpio"
- reg: an additional register set is needed, for the GPIO Blink
Counter on/off registers.
- reg-names: Must contain an entry "pwm" corresponding to the
additional register range needed for PWM operation.
- #pwm-cells: Should be two. The first cell is the GPIO line number. The
second cell is the period in nanoseconds.
- clocks: Must be a phandle to the clock for the GPIO controller.
gpio0: gpio@d0018100 {
......@@ -51,3 +69,17 @@ Example:
#interrupt-cells = <2>;
interrupts = <16>, <17>, <18>, <19>;
gpio1: gpio@18140 {
compatible = "marvell,armada-370-xp-gpio";
reg = <0x18140 0x40>, <0x181c8 0x08>;
reg-names = "gpio", "pwm";
ngpios = <17>;
#gpio-cells = <2>;
#pwm-cells = <2>;
#interrupt-cells = <2>;
interrupts = <87>, <88>, <89>;
clocks = <&coreclk 0>;
......@@ -10212,6 +10212,8 @@ F: include/linux/pwm.h
F: drivers/pwm/
F: drivers/video/backlight/pwm_bl.c
F: include/linux/pwm_backlight.h
F: drivers/gpio/gpio-mvebu.c
F: Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
M: Daniel Mack <>
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