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Commit a6c31840 authored by Sebastian Reichel's avatar Sebastian Reichel Committed by Sebastian Reichel
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arm64: dts: rockchip: Add missing SFC power-domains to rk3576


Add the power-domains for the RK3576 SFC nodes according to the
TRM part 1. This fixes potential SErrors when accessing the SFC
registers without other peripherals (e.g. eMMC) doing a prior
power-domain enable. For example this is easy to trigger on the
Rock 4D, which enables the SFC0 interface, but does not enable
the eMMC interface at the moment.

Cc: stable@vger.kernel.org
Fixes: 36299757 ("arm64: dts: rockchip: Add SFC nodes for rk3576")
Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.com>
parent e643c80b
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...@@ -1605,6 +1605,7 @@ sfc1: spi@2a300000 { ...@@ -1605,6 +1605,7 @@ sfc1: spi@2a300000 {
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_FSPI1_X2>, <&cru HCLK_FSPI1>; clocks = <&cru SCLK_FSPI1_X2>, <&cru HCLK_FSPI1>;
clock-names = "clk_sfc", "hclk_sfc"; clock-names = "clk_sfc", "hclk_sfc";
power-domains = <&power RK3576_PD_SDGMAC>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
...@@ -1655,6 +1656,7 @@ sfc0: spi@2a340000 { ...@@ -1655,6 +1656,7 @@ sfc0: spi@2a340000 {
interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_FSPI_X2>, <&cru HCLK_FSPI>; clocks = <&cru SCLK_FSPI_X2>, <&cru HCLK_FSPI>;
clock-names = "clk_sfc", "hclk_sfc"; clock-names = "clk_sfc", "hclk_sfc";
power-domains = <&power RK3576_PD_NVM>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
......
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