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clk: rockchip: implement linked gate clock support
Recent Rockchip SoCs have a new hardware block called Native Interface
Unit (NIU), which gates clocks to devices behind them. These clock
gates will only have a running output clock when all of the following
conditions are met:
1. the parent clock is enabled
2. the enable bit is set correctly
3. the linked clock is enabled
To handle them this code registers them as a normal gate type clock,
which takes care of condition 1 + 2. The linked clock is handled by
using runtime PM clocks. Handling it via runtime PM requires setting
up a struct device for each of these clocks with a driver attached
to use the correct runtime PM operations. Thus the complete handling
of these clocks has been moved into its own driver.
Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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- drivers/clk/rockchip/Makefile 1 addition, 0 deletionsdrivers/clk/rockchip/Makefile
- drivers/clk/rockchip/clk-rk3588.c 2 additions, 21 deletionsdrivers/clk/rockchip/clk-rk3588.c
- drivers/clk/rockchip/clk.c 52 additions, 0 deletionsdrivers/clk/rockchip/clk.c
- drivers/clk/rockchip/clk.h 25 additions, 0 deletionsdrivers/clk/rockchip/clk.h
- drivers/clk/rockchip/gate-link.c 85 additions, 0 deletionsdrivers/clk/rockchip/gate-link.c
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