- Feb 15, 2013
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Holger Brunck authored
All boards from this serie use i2c. There is no need to #ifdef the header. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com>
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git://git.denx.de/u-bootKim Phillips authored
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git://git.denx.de/u-boot-mipsTom Rini authored
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Daniel Schwierzeck authored
Remove the manual relocation of env_name_spec. This has been missed in the previous patch series for introducing dynamic relocation on MIPS. Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Simon Glass authored
This code is pretty old and we want to support only 32-bit systems now. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Graeme Russ <graeme.russ@gmail.com>
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Simon Glass authored
Invert the polarity of this option to simplify the Makefile logic. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Gabe Black <gabeblack@chromium.org>
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Simon Glass authored
These lines are dealt with in the x86 Makefile and link script, so punt them. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Gabe Black <gabeblack@chromium.org>
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Simon Glass authored
This x86 CPU variant is no longer required as the boards that use it have been removed. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Graeme Russ <graeme.russ@gmail.com>
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Simon Glass authored
These are no longer used and should be removed. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Graeme Russ <graeme.russ@gmail.com>
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- Feb 13, 2013
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git://git.denx.de/u-boot-mipsTom Rini authored
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- Feb 12, 2013
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Gabor Juhos authored
The code handles relocation entries with the following relocation types only: mips32: R_MIPS_REL32 mips64: R_MIPS_REL+R_MIPS_64 xburst: R_MIPS_REL32 Other relocation entries are skipped without processing. The code must be extended if other relocation types must be supported. Add -pie to LDFLAGS_FINAL to generate the .rel.dyn fixup table, which will be applied to the relocated image before transferring control to it. The CONFIG_NEEDS_MANUAL_RELOC is not needed after the patch, so remove that as well. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Gabor Juhos authored
This section contain the table needed for dynamic relocation. Also provide symbols for the relocation code to access the table. Discard all sections which are not needed in the final ELF binary and U-Boot image. Section .dynsym cannot be discarded or GNU ld crashes otherwise. This section will be stripped by GNU objcpy in a later patch. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Daniel Schwierzeck authored
Use the newly introduced symbol __image_copy_end as end address for relocation of U-Boot image. This is needed for dynamic relocation added in later patches. This patch obsoletes the symbols uboot_end and uboot_end_data which are removed. Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Daniel Schwierzeck authored
Get the start and end address for clearing BSS from the newly introduced symbols __bss_start and __bss_end. After GOT is relocated, those symbols are already pointing to the correct addresses. Also optimize the loop by moving the address incrementation to the delay slot to avoid the initial sub instruction. Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Daniel Schwierzeck authored
Use the newly introduced symbols __image_copy_end and __bss_end for setting up the memory area for the relocated U-Boot. Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Daniel Schwierzeck authored
This symbol is used in later patches as end address for relocation of the U-Boot image into RAM. Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Daniel Schwierzeck authored
These symbols are used in later patches for as addresses for clearing the BSS area in the relocated U-Boot image. Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Gabor Juhos authored
The '__got_start' and '__got_end' symbols are used only in the linker script to compute the value of the 'num_got_entries' symbol. Remove the symbols and use the SIZEOF(.got) command to get the size of the .got section. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Daniel Schwierzeck authored
Adopt reset vector handling from Yamon. Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Daniel Schwierzeck authored
Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Daniel Schwierzeck authored
Fix access to global_data which is broken since commits: commit 035cbe99 Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:49:08 2012 +0000 mips: Move per_clk and dev_clk to arch_global_data Move these field into arch_global_data and tidy up. The other CONFIG_JZSOC fields are used by various architectures, so just remove the #ifdef bracketing for these. Signed-off-by:
Simon Glass <sjg@chromium.org> commit 582601da Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:48:35 2012 +0000 arm: Move lastinc to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by:
Simon Glass <sjg@chromium.org> commit 66ee6923 Author: Simon Glass <sjg@chromium.org> Date: Thu Dec 13 20:48:34 2012 +0000 arm: Move tbl to arch_global_data Move this field into arch_global_data and tidy up. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
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Tom Rini authored
In commit cfd4ff6f we implemented part of advisory 1.0.10 (internal delay for RGMII mode not supported). This in turn however requires that we set the tx clock delay feature in the PHY itself. Signed-off-by:
Tom Rini <trini@ti.com>
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git://git.denx.de/u-boot-armTom Rini authored
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- Feb 11, 2013
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Lucas Stach authored
No one expects to end up in a delayed environment if CONFIG_DELAY_ENVIRONMENT isn't defined. Signed-off-by:
Lucas Stach <dev@lynxeye.de> Acked-by:
Simon Glass <sjg@chromium.org> Acked-by:
Allen Martin <amartin@nvidia.com>
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Tom Warren authored
This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Tom Warren authored
This patch adds basic Tegra114 (T114) build support - no specific board is targeted. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Tom Warren authored
These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Tom Warren authored
These files are used by both SPL and main U-Boot. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Tom Warren authored
These files are for code that runs on the CPU (A15) on T114 boards. At this time, there is no A15-specific code here. As T114-specific run-time code is added, it'll go here. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Tom Warren authored
This provides SPL support for T114 boards - AVP early init, plus CPU (A15) init/jump to main U-Boot. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Tom Warren authored
Common Tegra files are in arch-tegra, shared between T20/T30/T114. Tegra114-specific headers are in arch-tegra114. Note that some of these will be filled in as more T114 support is added (drivers, WB/LP0 support, etc.). Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Turn on SPI in cardhu config file Signed-off-by:
Allen Martin <amartin@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Allen Martin authored
Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Allen Martin authored
Add I/O addresses of SPI SLINK controllers 1-6 Signed-off-by:
Allen Martin <amartin@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Allen Martin authored
Add tegra30 SPI SLINK nodes to fdt. Signed-off-by:
Allen Martin <amartin@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Allen Martin authored
SBC1 is SPI controller 1 on tegra30 Signed-off-by:
Allen Martin <amartin@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Allen Martin authored
Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Allen Martin authored
Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
Only add "lcd" into TEGRA_DEVICE_SETTINGS if CONFIG_VIDEO_TEGRA. Otherwise, "lcd" is meaningless. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
FUNCMUX_ defines should be named after the pin groups they affect, not after the module they're muxing onto those pin groups. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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