This compatible was only added to the list for compatibility with older
dtschema (<2024.02). Add it to the other list also so both new and old
tools work.

Fixes: 0d078d47 ("dt-bindings: mfd: syscon: Add ti,j784s4-acspcie-proxy-ctrl compatible")
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Romain Naour <romain.naour@smile.fr>
Link: https://lore.kernel.org/r/20250103174524.28768-2-afd@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

This compatible seems to be missing the last 'e', looks to be a typo
when creating this file. Noticed this when diff'ing the two compatible
lists (which should stay in sync).

Fixes: f97b0435 ("dt-bindings: mfd: syscon: Split and enforce documenting MFD children")
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250103174524.28768-4-afd@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

Document rk3562 compatible for QoS registers.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Link: https://lore.kernel.org/r/20241224094920.3821861-16-kever.yang@rock-chips.com


Signed-off-by: Lee Jones <lee@kernel.org>

The "mss_top_scb" register region on PolarFire SoC contains many
different functions, including controls for the AXI bus and other things
mainly of interest to the bootloader. The interrupt register for the
system controller's mailbox is also in here, which is needed by the
operating system.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241002-clambake-raider-a8cbb3a021a8@spud


Signed-off-by: Lee Jones <lee@kernel.org>

Document rk3576 compatible for QoS registers.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/01020191998a2fd4-4d7b091c-9c4c-4067-b8d9-fe7482074d6d-000000@eu-west-1.amazonses.com


Signed-off-by: Lee Jones <lee@kernel.org>

The ACSPCIE_PROXY_CTRL registers within the CTRL_MMR space of TI's J784S4
SoC are used to drive the reference clock to the PCIe Endpoint device via
the PAD IO Buffers. Add the compatible for allowing the PCIe driver to
obtain the regmap for the ACSPCIE_CTRL register within the System
Controller device-tree node in order to enable the PAD IO Buffers.

The Technical Reference Manual for J784S4 SoC with details of the
ASCPCIE_CTRL registers is available at:
https://www.ti.com/lit/zip/spruj52



Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240715120936.1150314-2-s-vadapalli@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

Add compatible for an already used syscon poweroff/mailbox block in APM.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240627-dt-bindings-mfd-syscon-split-v4-7-dc6699a9f3e4@linaro.org


Signed-off-by: Lee Jones <lee@kernel.org>

Simple syscon nodes can be documented in common syscon.yaml, however
devices with simple-mfd compatible, thus with some children, should have
their own schema listing these children.  Such listing makes the binding
specific, allows better validation (so the incorrect child would not
appear in the simple-mfd node) and actually enforces repeated rule for
simple-mfd devices:

  "simple-mfd" is only for simple devices, where the children do not
  depend on the parent.

Currently the syscon+simple-mfd binding is quite broad and allows
any child or property, thus above rule cannot be enforced.

Split the syscon.yaml binding into:
1. Common syscon properties, used potentially by many bindings.
2. Simple syscon devices (NO simple-mfd!).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240627-dt-bindings-mfd-syscon-split-v4-6-dc6699a9f3e4@linaro.org


Signed-off-by: Lee Jones <lee@kernel.org>

The JTAG_USER_ID_USERCODE efuse address, which is located inside the
WKUP_CTRL_MMR0 range holds information to identify the speed grades of
various components on TI's K3 SoCs. Add a compatible to allow the
cpufreq driver to obtain the data to limit the maximum frequency for the
CPUs under Linux control.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240621-ti-opp-updates-v3-3-d857be6dac8b@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

Add another batch of various "simple" syscon compatibles which were
undocumented or still documented with old text bindings. Remove the old
text binding docs for the ones which were documented.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240603131230.136196-2-robh@kernel.org


Signed-off-by: Lee Jones <lee@kernel.org>

Add TI DSS OLDI-IO control registers compatible for AM625 DSS. This is a
region of 10 32bit registers found in the TI AM625 CTRL_MMR0 register
space[0]. They are used to control the characteristics of the OLDI
DATA/CLK IO as needed by the OLDI TXes controller node.

[0]: https://www.ti.com/lit/pdf/spruiv7



Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240512143824.1862290-1-a-bhatia1@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

ti,am654-serdes-ctrl is not a simple syscon device - it has children -
thus it should be fully documented in its own binding.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-5-3409903bb99b@linaro.org


Signed-off-by: Lee Jones <lee@kernel.org>

microchip,sparx5-cpu-syscon is not a simple syscon device - it has
children and implements simple-mfd compatible - thus it should be fully
documented in its own binding.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-4-3409903bb99b@linaro.org


Signed-off-by: Lee Jones <lee@kernel.org>

intel,lgm-syscon is not a simple syscon device - it has children - thus
it should be fully documented in its own binding.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-3-3409903bb99b@linaro.org


Signed-off-by: Lee Jones <lee@kernel.org>

Apparently there is no in-tree DTS syscon node having hwlocks, so drop
the property to simplify the binding.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-1-3409903bb99b@linaro.org


Signed-off-by: Lee Jones <lee@kernel.org>

The CTRLMMR_MAC_IDx registers within the CTRL_MMR space of TI's AM62p SoC
contain the MAC Address programmed in the eFuse. Add compatible for
allowing the CPSW driver to obtain a regmap for the CTRLMMR_MAC_IDx
registers within the System Controller device-tree node. The default MAC
Address for the interface corresponding to the first MAC port will be set
to the value programmed in the eFuse.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240402105708.4114146-1-s-vadapalli@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

Add various "simple" syscon compatibles which were undocumented or
still documented with old text bindings.

apm,xgene-csw, apm,xgene-efuse, apm,xgene-mcb, apm,xgene-rb,
fsl,ls1088a-reset, marvell,armada-3700-cpu-misc,
mediatek,mt2712-pctl-a-syscfg, mediatek,mt6397-pctl-pmic-syscfg, and
mediatek,mt8173-pctl-a-syscfg were all undocumented, but are in use
already. Remove the old text binding docs for the others.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240402202413.757283-1-robh@kernel.org


Signed-off-by: Lee Jones <lee@kernel.org>

Add the compatible for TI AM62 USB PHY Control register. This
register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It
is used to indicate the USB PHY PLL reference clock rate and
core voltage level to the USB controller.

[1] - https://www.ti.com/lit/pdf/spruiv7



Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240226-b4-for-v6-5-am62-usb-typec-dt-v6-1-acf77fff4344@kernel.org


Signed-off-by: Lee Jones <lee@kernel.org>

Add TI SERDES control registers compatible. This is a region found in the
TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
SERDES clock and lane select mux.

[0] https://www.ti.com/lit/pdf/spruid7



Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240205174736.27749-1-afd@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC
are used to configure the link speed, lane count and mode of operation
of the respective PCIe instance. Add compatible for allowing the PCIe
driver to obtain a regmap for the PCIE_CTRL register within the System
Controller device-tree node in order to configure the PCIe instance
accordingly.

The Technical Reference Manual for J784S4 SoC with details of the
PCIE_CTRL registers is available at: https://www.ti.com/lit/zip/spruj52



Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240204090336.3209063-1-s-vadapalli@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

Add TI DSS OLDI-IO control registers compatible. This is a region of 5
32bit registers found in the TI AM65 CTRL_MMR0 register space[0]. They
are used to control the characteristics of the OLDI DATA/CLK IO as needed
by the DSS display controller node.

[0] https://www.ti.com/lit/pdf/spruid7



Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230911142556.64108-1-afd@ti.com


Signed-off-by: Lee Jones <lee@kernel.org>

Document Rockchip RK3128 SoC compatible for qos registers.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230829171647.187787-2-knaerzche@gmail.com


Signed-off-by: Lee Jones <lee@kernel.org>

Add Loongson LS1B and LS1C compatibles for system controller.

Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Add Nuvoton ma35d1 system registers compatible.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230328021912.177301-6-ychuang570808@gmail.com

Document StarFive JH7100 SoC compatible for sysmain registers.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230211031821.976408-7-cristian.ciocaltea@collabora.com

Document Mediatek mt8365-syscfg

Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230125143503.1015424-4-bero@baylibre.com

Simple syscon devices may require deassertion of a reset signal in order
to access their register set. This change adds the `resets` property from
reset.yaml#/properties/resets (referenced through core.yaml), specifying
a maxItems of 1 for a single (optional) reset descriptor.

This will allow a future change to the syscon driver to implement reset
control.

Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230105005010.124948-2-jk@codeconstruct.com.au

Add the AMD Pensando Elba SoC system registers compatible

Signed-off-by: Brad Larson <blarson@amd.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230119035136.21603-6-blarson@amd.com

Document hpe,gxp-sysreg compatible for GXP registers.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20221216183532.78933-4-nick.hawkins@hpe.com

Split Samsung Exynos SoC SYSREG bindings to own file to narrow the
bindings and do not allow other parts of syscon.yaml.  This allows
further customization of Samsung SoC bindings.

Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Sriranjani P <sriranjani.p@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221127123259.20339-2-krzysztof.kozlowski@linaro.org


Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

The Shared Memory interface (SHM) is a piece of hardware in Nuvoton BMCs
that allows a host processor (connected via LPC) to access flash and RAM
that belong to the BMC. The SHM includes a register block accessible from
the BMC side.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20221105185911.1547847-5-j.neuschaefer@gmx.net

Document rk3588 compatible for QoS registers.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20220906143825.199089-5-sebastian.reichel@collabora.com

reg-io-width is a standard property, so no need for defining its type

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20220823101021.387034-1-krzysztof.kozlowski@linaro.org

The syscon bindings require a device specific compatible, beside the
"syscon".  However schema counts "simple-mfd" as such, which allows
simple-mfd+syscon to sneak in.

Adjust the match to be sure simple-mfd also comes with a device specific
compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20220817142246.828762-5-krzysztof.kozlowski@linaro.org

Document dt-bindings for Rockchip RV1126 QoS registers.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20220723204335.750095-17-jagan@edgeble.ai

Document i.MX93 BLK CTRL system registers.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

As indicated in
link: https://lore.kernel.org/all/20220822204945.GA808626-robh@kernel.org/



DT schema files should not have 'Device Tree Binding' as part of there
title: line. Remove this in most .yaml files, so hopefully preventing
developers copying it into new .yaml files, and being asked to remove
it.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20220825020427.3460650-1-andrew@lunn.ch


Signed-off-by: Rob Herring <robh@kernel.org>

Going forward, I'll be using my kernel.org for upstream work.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220714112533.539910-8-lee@kernel.org

The i.MX iomuxc-gpr bindings are undocumented and a mess. Drop their use
from the examples.

The problem with the binding beyond the just random variations is that
the iomuxc-gpr is not a separate block, but registers within the iomuxc
block containing random leftover controls. As a separate DT node, it
creates nodes with overlapping memory addresses.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220422192121.2592030-1-robh@kernel.org

Add the Microchip LAN966x CPU system registers compatible.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220313003122.19155-1-michael@walle.cc