The rk3576 uses a different base-compatible, as starting with this
generation, the clock phase tuning is done via registers inside
the mmc controller and not from inside the CRU.

In U-Boot we do not tune at all, so no other code changes are
necessary.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

- add missing tap and delay num added in rk3528 series, see [1]
- after [2] and these new tap and delay values HS200 mode should work

[1] https://patchwork.ozlabs.org/patch/2038152/
[2] https://patchwork.ozlabs.org/patch/2038155/

Add support for RK3576 to the rockchip sdhci driver.

It's pretty similar to its cousins found in the RK3568 and RK3588 and the
specific hs400-tx-tap number was taken from the vendor-u-boot.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Add support for RK3588 compatible.
The RK3576 OTP uses the same read mechanism as the RK3588, just
with different values for offset and size.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

- change to use regmap_update_bits() to closer match linux
- remove debug() calls, pinctrl-rockchip-core.c has similar debug()

Add support for the rk3576 variant of pinctrl.

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The current DT bindings for the rk3576 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.

This follows the implementation done in the Linux-Kernel and also
how the rk3588 does this both in the Linux-Kernel as well as U-Boot.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[adapted from mainline Linux code for u-boot]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

- remove unused clk info struct
- remove unused grf reference in cru priv struct
- add ref_clk0_out_pll from header in latest vendor tag

Add clock driver support for Rockchip RK3576 SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

- remove probe, no need to cache ram_info
- read sdram size direct in get_info callback
- remove syscon dependancy and use define for base addr and reg

Add ddr driver for rk3576 to get the ram capacity.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

- add basic checkboard() to read cpu code from otp, should be extended
  to check cpu variant in future, i.e. RK3576J

- remove unused grf header
- remove unused ioc header

- remove unused syscon types, GRF and PMUGRF could probably also be removed
- rename driver to be more consistent

- use defined cru base address, simplify code and saves a few ms during
  boot

- remove unused spl, grf and ioc header include
- remove invalidate cache workaround, sdhci invalidate and ram_base has
  been fixed in [1] and [2]
- use defines for HP TIMER config
- use SPL_BUILD instead of !TPL_BUILD && XPL_BUILD for arch_cpu_init()

[1] https://patchwork.ozlabs.org/patch/2038102/
[2] https://patchwork.ozlabs.org/patch/2039037/

- add minimal rng node, see [1] for driver
- add minimal otp node instead of picking an unmerged dts/upstream patch
- add missing emmc_rstnout, sdmmc0_pwren and pcfg_pull_up_drv_level_3
  pinctrl nodes
- add missing ioc_grf to fix use of pinctrl in SPL
- remove bootph props from unreferenced pcfg_pull_down and php_grf nodes
- adjust bootph for uart pinctrl to save a few ms boot time

[1] https://patchwork.ozlabs.org/patch/2038156/

- drop SCMI related options
- imply common options under SoC symbol instead of each board defconfig
- use ROCKCHIP_COMMON_STACK_ADDR after [1]
- add SYS_CONFIG_NAME to allow adding a board defconfig without a TARGET

[1] https://patchwork.ozlabs.org/patch/2039045/

- add missing CFG_CPUID_OFFSET, 0xa instead of default 0x10
- limit SDRAM_MAX_SIZE to space below the 4G address boundary
- allow ROCKCHIP_DEVICE_SETTINGS to be undefined
- remove the legacy partitions env var, the recommentation is to use a
  single or two partitions, first starting at 16+ MiB offset

The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A72
and quad-core Cortex-A53 including 6TOPS NPU, Mali-G52 MC3, HDMI Out,
DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, UFS,
USB OTG 3.0, Type-C, USB 2.0, PCIe 2.1, SATA 3, Ethernet, SDIO3.0, I2C,
UART, SPI, GPIO and PWM.

Add arch core support for it.

Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
[adapted for mainline u-boot]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Add support for rk3576 package header in mkimage tool.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

- use CFG_SYS_SDRAM_BASE + SZ_2M consistently
- change to use SZ_2M and SZ_32M for TF-A/OP-TEE

Currently the sdram code for arm64 expects CFG_SYS_SDRAM_BASE to be 0.
The ram being in front and the device-area behind it.

The upcoming RK3576 uses a different layout, with the device area
in front the ram, which then also extends past the 4G mark.

Adapt both the generic zone definitions as well as the ATAG parser
to be usable on devices where CFG_SYS_SDRAM_BASE is not 0.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>

The Radxa E20C is an ultra-compact network computer with a RK3528A SoC
that offers a wide range of networking capabilities.

Features tested on a Radxa E20C v1.104:
- SD-card boot
- eMMC boot
- Ethernet
- USB host

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add a minimal generic RK3528 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3528 boards that follow reference board design.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add a rk3528-u-boot.dtsi extending the basic dts/upstream rk3528.dtsi
with bare minimum nodes to have a booting system from eMMC and SD-card.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Import rk3528-pinctrl.dtsi from vendor U-Boot and Linux tag
linux-6.1-stan-rkr5 with the hdmi-pins-idle node removed due to missing
label reference to pcfg_output_low_pull_down.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add support for rkrng variant, used by e.g. RK3528 and RK3576.

Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with minor
adjustments for mainline.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Enable clock stopping to gate clock during phase code change to ensure
glitch free phase switching in auto-tuning circuit. Fixes HS200 mode
on RK3528.

POST_CHANGE_DLY
Time taken for phase switching and stable clock output.
- Less than 4-cycle latency

PRE_CHANGE_DLY
Maximum Latency specification between transmit clock and receive clock.
- Less than 4-cycle latency

TUNE_CLK_STOP_EN
Clock stopping control for Tuning and auto-tuning circuit. When enabled,
clock gate control output is pulled low before changing phase select
codes. This effectively stops the receive clock. Changing phase code
when clocks are stopped ensures glitch free phase switching.
- Clocks stopped during phase code change

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add initial support for SDHCI controller in RK3528.

Only MMC Legacy and MMC High Speed (52MHz) mode is supported after this,
more work is needed to get the faster HS200/HS400/HS400ES modes working.

Variant tap and delay num is copied from vendor Linux tag
linux-6.1-stan-rkr5.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

RK3528 and RK3576 use different tap and delay num for cmdout and strbin.

Move tap and delay num for cmdout and strbin to driver data to prepare
for adding new SoCs.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add pinctrl driver for RK3528.

Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with adjustments
to use regmap_update_bits().

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add clock driver for RK3528.

Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with minor
adjustments and fixes for mainline.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add support for reading DRAM size information from PMUGRF os_reg18 reg.

Compared to most Rockchip SoCs the RK3528 use os_reg18 for DRAM info,
instead of os_reg2.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Rockchip RK3528 is a ARM-based SoC with quad-core Cortex-A53.

Add initial arch support for the RK3528 SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Add support for generating Rockchip Boot Image for RK3528.

Similar to RK3568, the RK3528 has 64 KiB SRAM and 4 KiB of it is
reserved for BootROM.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>