- Jul 04, 2023
-
-
Christopher Obbard authored
Bullseye is outdated; bump to build container to bookworm which is the latest stable Debian version. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
-
Christopher Obbard authored
There is no need to use a fixed toolchain; let's use the toolchain provided by Debian. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
-
Christopher Obbard authored
There is no need to use my fork which may go away at a moment's notice. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
-
Christopher Obbard authored
Currently the build is slow as it doesn't use all of the CPU cores. Add the correct flags such that the build uses all CPU cores. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
-
Christopher Obbard authored
We don't need to add the loader file to the git repo as the CI has steps to build it. This reverts commit 4bc2b120. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
-
Christopher Obbard authored
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
-
Enable CONFIG_PCI_INIT_R for rock5b pci enumeration during boot in order to autodetect the PCI ethernet NIC during the boot process. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
-
Eugen Hristev authored
With this config on, we are able to boot with a legacy CPIO ramdisk. Without it, U-boot does not recognize the image: => booti 0x0400000 0xa200000 0xa100000 Wrong Ramdisk Image Format Ramdisk image is corrupt or invalid Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa. There are tree variants depending on the DRAM size : 4G, 8G and 16G. Specifications: Rockchip Rk3588S SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector 4-lane MIPI DSI connector Audio – 3.5mm earphone jack eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60 Gigabit Ethernet RJ45 with optional PoE support 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 56mm (Raspberry Pi 4 form factor) Kernel commits: d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board") 991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a") 304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a") cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
- Jun 22, 2023
-
-
Eugen Hristev authored
Update description with correct specifications Fixes: 3bf8e408 ("board: rockchip: add Radxa ROCK5B Rk3588 board") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
- Jun 21, 2023
-
-
Eugen Hristev authored
The second parameter for clk_release_all is used as an unsigned (which makes sense) but the function prototype declares it as an int. This causes warnings/error like such below: include/clk.h:422:48: error: conversion to ‘int’ from ‘unsigned int’ may change the sign of the result [-Werror=sign-conversion] 422 | return clk_release_all(bulk->clks, bulk->count); To fix this, changed the type of the count to `unsigned int` Fixes: 82a8a669 ("clk: add clk_release_all()") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Enable DFU and related configs, expand stack and buffers to hold downloaded image. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Prepare env variables for DFU Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
In case SPL was booted from USB, add the gadget as the boot device for the 'same-as-spl' boot order next device. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Add DFU as a possible SPL boot media if the boot device is a gadget device. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Add bootph-all to gadget nodes to have the gadget available in SPL. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Since EP0 transactions need to be completed before the controller halt sequence is finished, this may take some time depending on the host and the enabled functions. Increase the controller halt timeout, so that we give the controller sufficient time to handle EP0 transfers. Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com> Link: https://lore.kernel.org/r/20220901193625.8727-4-quic_wcheng@quicinc.com Cherry-picked from Linux: 461ee467507c ("usb: dwc3: Increase DWC3 controller halt timeout") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
[ Nguyen/Greg: Ported from Linux kernel commit f4fd84ae0765a ("usb: dwc3: core: Only handle soft-reset in DCTL") ] Make sure not to set run_stop bit or link state change request while initiating soft-reset. Register read-modify-write operation may unintentionally start the controller before the initialization completes with its previous DCTL value, which can cause initialization failure. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
-
[ Nguyen/Felipe/Greg: Ported from Linux kernel commit 5b738211fb59 ("usb: dwc3: gadget: Don't send unintended link state change") ] DCTL.ULSTCHNGREQ is a write-only field. When doing a read-modify-write to DCTL, the driver must make sure that there's no unintended link state change request from whatever is read from DCTL.ULSTCHNGREQ. Set link state change to no-action when the driver writes to DCTL. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
-
[ Felipe: Ported from Linux kernel commit f59dcab17629 ("usb: dwc3: core: improve reset sequence") ] According to Synopsys Databook, we shouldn't be relying on GCTL.CORESOFTRESET bit as that's only for debugging purposes. Instead, let's use DCTL.CSFTRST if we're OTG or PERIPHERAL mode. Host side block will be reset by XHCI driver if necessary. Note that this reduces amount of time spent on dwc3_probe() by a long margin. We're still gonna wait for reset to finish for a long time (default to 1ms max), but tests show that the reset polling loop executed at most 19 times (modprobe dwc3 && modprobe -r dwc3 executed 1000 times in a row). Without proper core reset, observing random issues like when the USB(DWC3) is in device mode, the host device is not able to detect the USB device. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> [eugen.hristev@collabora.com: keep the PHY resets code] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
For environment in SPL, all these defines are required, otherwise build fails: [...] include/env_default.h:120:9: note: in expansion of macro ‘CFG_EXTRA_ENV_SETTINGS’ 120 | CFG_EXTRA_ENV_SETTINGS | ^~~~~~~~~~~~~~~~~~~~~~ In file included from env/common.c:32: [...] Environment in SPL is needed e.g. for DFU, as dfu_alt is kept as env variable. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Unlike it's Linux counterpart, clk_get_rate can return a negative value, -ve. The driver does not take that into account, stores the rate into an unsigned long, and if clk_get_rate fails, it will take into consideration the actual value and wrongly program the hardware. E.g. on error -2 (no such entry), the rate will be 18446744073709551614 and this will be subsequently used by the driver to program the DWC3 To fix this, exit the function if the value is negative. Fixes: 6bae0eb5 ("usb: dwc3: Calculate REFCLKPER based on reference clock") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
s/Suppport/Support Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Enable configuration for USB 3.0 controller, the commands required, and the gadget drivers. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Enable the USB3.0 host node, and gadget node. The gadget is available through the USB type C connector on the board. The connector is tied to a Fairchild fusb302b device, which currently does not have a driver in U-boot, but the node is here for correct description of the board + Linux future compatibility. It will be easier to move the node as-is when it will be available in the DT from Linux Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Add support for the USB 3.0 devices in rk3588: - USB DRD(dual role device) 3.0 #0 as usbdrd3_0 which is available in rk3588s - USB DRD(dual role device) 3.0 #1 as usbdrd3_1 which is available in rk3588 only - USB DP PHY (combo USB3.0 and DisplayPort Alt Mode ) #0 phy interface as usbdp_phy0 - USB DP PHY (combo USB3.0 and DisplayPort Alt Mode ) #1 phy interface as usbdp_phy1 - USB 2.0 phy #2 , the USB 3.0 device can work with this phy in USB 2.0 mode - associated GRFs (general register files) for the devices. Signed-off-by: Joseph Chen <chenjh@rock-chips.com> [eugen.hristev@collabora.com: move nodes to right place, adapt from latest linux kernel] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
This adds a new USBDP combo PHY with Samsung IP block driver. The PHY is a combo between USB 3.0 and DisplayPort alt mode. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> [eugen.hristev@collabora.com: ported to 2023.07, clean-up] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Sync the devicetree with linux-next tag: next-20230525 Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
The support for #address-cells=2 has a loophole: if the reg is actually 0, but the #address-cells is actually 1, like in such case below: syscon { #address-cells = <1>; phy { reg = <0 0x10>; }; }; then the second u32 of the 'reg' is the size, not the address. The code should check for the parent's #address-cells value, and not assume that if the first u32 is 0, then the #address-cells is 2, and the reg property is something like reg = <0 0xff00 0x10>; Fixed this by looking for the #address-cells value and retrieving the reg address only if this is ==2. To avoid breaking anything I also kept the check `if reg==0` as some DT's may have a wrong #address-cells as parent and even if this commit is correct, it might break the existing wrong device-trees. Fixes: d538efb9 ("phy: rockchip: inno-usb2: Add support #address_cells = 2") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Currently, U-boot considers bootable only the EFI System Partition (SD_GPT_ESP). However it is custom that the boot files are placed under /boot in a rootfs partition. This happens e.g. on Debian on ARM64. To have this partition checked for boot files (distro boot, extlinux boot), add the ARM64_ROOTFS_GUID (SD_GPT_ROOT_ARM64) to `is_bootable` check for partitions. This would allow U-boot to search inside this partition for boot files. GUIDs taken from spec here: https://uapi-group.org/specifications/specs/discoverable_partitions_specification/ Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Add rockchip spl tool to artifacts. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Add rockchip spl loader using git lfs. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
of_property_match_string calls of_find_property to search for the string property. If the device node does not exist, of_find_property returns NULL, and of_property_match_string returns -EINVAL, which is correct. However, if the device node exists, but the property is not found, of_find_property still returns NULL, but it will place -FDT_ERR_NOTFOUND in the *lenp variable. of_property_match_string does not use the lenp parameter, thus this error case is being lost, and treated as if the node is NULL, and returns -EINVAL, which is incorrect. The callers of of_property_match_string treat the error differently if the return value is -EINVAL or -ENOENT, e.g. in dwc3 driver: ret = generic_phy_get_by_name(dev, "usb3-phy", &phy); if (!ret) { ret = generic_phy_init(&phy); if (ret) return ret; } else if (ret != -ENOENT && ret != -ENODATA) { debug("could not get phy (err %d)\n", ret); return ret; } else { phy.dev = NULL; } So the caller drivers will just consider the property missing if -ENOENT is returned, versus the case of -EINVAL, which means something else. To fix this situation, changed the code to call the of_find_property with the right third argument to catch this error code and treat it accordingly. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
The rtl8169 driver uses calls to dm_pci_bus_to_phys, which are compiled under CONFIG_PCI. Without CONFIG_PCI, this happens: drivers/net/rtl8169.o: in function `rtl_recv_common': drivers/net/rtl8169.c:555: undefined reference to `dm_pci_bus_to_phys' It is only natural that this driver depends on CONFIG_PCI then. The device does not work connected in another way anyway, and the driver does not assume anything else at this moment. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Build also the rockusb binary using the boot merger. Store it as an artifact Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
We need prebuilt artifacts for Rock-5B board. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Will be replaced by internal pipeline. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-
Eugen Hristev authored
Add .ini file for use with boot merger tool to create DDR blob + SPL binary. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
-